Bluetooth: remove direct compilation of 6lowpan_iphc.c

It's now built as a separate utility module, and enabling BT selects
that module in Kconfig. This fixes:

net/ieee802154/built-in.o:(___ksymtab_gpl+lowpan_process_data+0x0): multiple definition of `__ksymtab_lowpan_process_data'
net/bluetooth/built-in.o:(___ksymtab_gpl+lowpan_process_data+0x0): first defined here
net/ieee802154/built-in.o:(___ksymtab_gpl+lowpan_header_compress+0x0): multiple definition of `__ksymtab_lowpan_header_compress'
net/bluetooth/built-in.o:(___ksymtab_gpl+lowpan_header_compress+0x0): first defined here
net/ieee802154/built-in.o: In function `lowpan_header_compress':
net/ieee802154/6lowpan_iphc.c:606: multiple definition of `lowpan_header_compress'
net/bluetooth/built-in.o:/home/swarren/shared/git_wa/kernel/kernel.git/net/bluetooth/../ieee802154/6lowpan_iphc.c:606: first defined here
net/ieee802154/built-in.o: In function `lowpan_process_data':
net/ieee802154/6lowpan_iphc.c:344: multiple definition of `lowpan_process_data'
net/bluetooth/built-in.o:/home/swarren/shared/git_wa/kernel/kernel.git/net/bluetooth/../ieee802154/6lowpan_iphc.c:344: first defined here
make[1]: *** [net/built-in.o] Error 1

(this change probably simply wasn't "git add"d to a53d34c3465b)

Fixes: a53d34c3465b ("net: move 6lowpan compression code to separate module")
Fixes: 18722c247023 ("Bluetooth: Enable 6LoWPAN support for BT LE devices")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
dma: tegra: add support for Tegra148/124

Tegra148 introduces a few changes to the APB DMA HW registers. Update the
driver to cope with them. Tegra124 inherits these changes.

* The register address stride between DMA channels increases.

* A new per-channel WCOUNT register is introduced.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
[swarren, remove .dts file change, rewrote commit description, removed
some duplicate/unused code and register IO]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
---
v3:
* Remove some unnecessary parentheses.
v2:
* Remove some unused #defines that had incorrect names or values.
* Remove unnecessary initialization of wcount local variable.

This can be applied directly to the usual dmaengine branch; I've checked
it doesn't conflict with the patches going through other trees which
convert the driver to use the standard reset framework, or implement a
DT DMA provider.
ARM: tegra: document which Dalmore revisions are supported

There are a number of revisions of the Dalmore board, each with a variety
of incompatible SW-visible HW changes. The Dalmore DT file in the kernel
only supports HW revision A04. Document this in the DT file.

Reported-by: Paul Walmsley <pwalmsley@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
ARM: tegra: paz00: Add LVDS support to device tree

Add backlight and panel nodes for the PAZ00 TFT LCD panel.

Signed-off-by: Marc Dietrich <marvin24@gmx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: enable LCD panel on Seaboard

Seaboard uses a CLAA101WA01A LCD panel. Enable the relevant display
controller, backlight, and regulators.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
---
v2:
* s/chungwa/chunghwa/
* Use the correct PWM instance
ARM: tegra: enable LCD panel on Ventana

Ventana uses a CLAA101WA01A LCD panel. Enable the relevant display
controller, backlight, and regulators.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
---
v2:
* s/chungwa/chunghwa/
* Use the correct PWM instance
drm/tegra: Obtain head number from DT

The head number of a given display controller is fixed in hardware and
required to program outputs appropriately. Relying on the driver probe
order to determine this number will not work, since that could yield a
situation where the second head was probed first and would be assigned
head number 0 instead of 1.

By explicitly specifying the head number in the device tree, it is no
longer necessary to rely on these assumptions. As a fallback, if the
property isn't available, derive the head number from the display
controller node's position in the device tree. That's somewhat more
reliable than the previous default but not a proper solution.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: dmaengine: remove SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME

struct snd_dmaengine_pcm_config's new chan_names field implements the
same feature, and nothing uses SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME,
so remove it.

FIXME: Need to create a patch to ASoC's topic/samsung(?) branch to stop
it from using SND_DMAENGINE_PCM_FLAG_CUSTOM_CHANNEL_NAME first...

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: dmaengine: remove compat_request_channel

struct snd_dmaengine_pcm_config's compat_request_channel field is no
longer set anywhere. Remove it, and the code that implements it.

FIXME: Need to wait for ux500 driver not to be using this feature.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
HACK: ARM: tegra: temp hack to enable poweroff on Venice2

Signed-off-by: Stephen Warren <swarren@nvidia.com>
LOCAL HACK: tegra_defconfig changes

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: bluetooth testing hacks for Cardhu

Signed-off-by: Stephen Warren <swarren@nvidia.com>
HACK: Attempt to get DMICs working
Revert "HACK: Attempt to get DMICs working"

This reverts commit 7696d3e61c2dd5ce3f480083dc506be340062a9b.
ARM: tegra: remove tegra EMC scaling driver

Nothing calls into the Tegra EMC (External Memory Controller) scaling
driver any more, so it's dead code. Remove it.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ASoC: wm8903: disable IRQs during BIAS_OFF

If the WM8903 IRQ is triggered after the device is suspended, or before
it is resumed, the underlying I2C bus that the WM8903 is attached to may
not be available. This may cause the IRQ handler to emit the following
error:

    wm8903 0-001a: Failed to read IRQ status: -16

... or perhaps even cause a failure inside the I2C driver.

To prevent this, explicitly mask all interrupt sources when entering
BIAS_OFF. Also, modify the IRQ handler to immediately return if the
device is in BIAS_OFF, so that shared interrupt lines don't cause a
similar problem. This requires that WM8903 interrupts be disabled to
avoid interrupt storms.

During resume (actually, the transition back to BIAS_STANDBY), restore
the desired IRQ mask.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Revert "ASoC: wm8903: disable IRQs during BIAS_OFF"

This reverts commit 294680591cf91d99c1af375c055d39813338a04c.
mmc: core: don't return 1 for max_discard

In mmc_do_calc_max_discard(), if only a single erase block can be
discarded within the host controller's timeout, don't allow discard
operations at all.

Previously, the code allowed sector-at-a-time discard (rather than
erase-block-at-a-time), which was chronically slow.

Without this patch, on the NVIDIA Tegra Cardhu board, the loops result
in qty == 1, which is immediately returned. This causes discard to
operate a single sector at a time, which is chronically slow. With this
patch in place, discard operates a single erase block at a time, which
is reasonably fast.

Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Dong Aisheng <dongas86@gmail.com>
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Cc: Vladimir Zapolskiy <vz@mleia.com>
Fixes: e056a1b5b67b "(mmc: queue: let host controllers specify maximum discard timeout")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Revert "mmc: core: don't return 1 for max_discard"

This reverts commit afb1238d1a4be99749c37bbb48a437034e05e5f8.
Revert "mmc: queue: let host controllers specify maximum discard timeout"

This reverts commit e056a1b5b67b4e4bfad00bf143ab14f634777705.

Conflicts:
	drivers/mmc/card/queue.c