board/at91sam9m10g45ek: fix oscilator config item 12MHz, 18.432MHz

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Change CONFIG_LINK_ADDR to actually address, not remap address

The story is the at91bootstrap with its Link Address to remap address 0x0,
fails to boot up on at91sam9m10g45 REV.B chip.
The probable reason is ROMCode doesn't do remapping.
So do such changing, namely, chang Link Address to actually address.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Add scripts/fixboot.py to fix the size of the image for ROMCode to download

The size is located at the sixth vector, at offset 0x14.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
1-wire: easy to know which 1-wire ROM read failed

without this patch, when failed reading 1-wire ROM information, the
following right reading 1-wire ROM information won't display. And
also the log won't show which 1-wire ROM failed reading
---8>---
1-Wire: ROM Searching ... Done, 0x3 1-Wire chips found

1-Wire: BoardName | [Revid] | VendorName
WARNING: 1-Wire: Failed to get board information
---<8---

with this patch, it displays the right reading 1-wire ROM infomration
and show which 1-wire ROM information read failed
---8>---
1-Wire: ROM Searching ... Done, 0x3 1-Wire chips found

1-Wire: BoardName | [Revid] | VendorName
  #0x1  SAMA5D3x-MB [CC3]      FLEX
  #0x2  SAMA5D3x-DM [BB2]      FLEX
1-Wire: Failed to read CM board information
---<8---

Signed-off-by: Bo Shen <voice.shen@atmel.com>
1-wire: assignment after value checking

assignment after value checking

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Add SCM information when generate binary

Before, when boot at91bootstrap there is no SCM information
---8>---
AT91Bootstrap 3.5.3 (Thu May 30 14:57:42 CST 2013)
---<8---

Now, add this information
---8>---
AT91Bootstrap 3.5.3-00002-gc50c2a3-dirty (Thu May 30 15:34:23 CST 2013)
---<8---

Signed-off-by: Bo Shen <voice.shen@atmel.com>
OneWire: add board id for sama5d36 cpu module

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
board/at91sama5d3xek: add dt file name for sama5d36

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
PMC: add a pll initialization function

Useful for initializing the PLL charge pump that
some SoCs need.

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
sama5d3: change PLLA charge pump configuration

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
boards: use newly introduced pmc_init_pll() function

Instead of writing to PLLICPR register, use a generic PMC function:
the newly introduced pmc_init_pll().

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Makefile: change version to v3.5.4

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
board/sama5d3xek: change PLLA setting when PCK is 528MHz

Because the original setting with PLL = 1056MHz is out of range for the PLL,
change the setting with PLL = 528MHz without PLLADIV2 usage.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
ddramc: remove not needed header includes

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
board/sama5d3xek: trivial: update comments for clock frequencies

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
board/Config.in: trivial: fix SAMA5D3EK help text in Kconfig

Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
board/sama5d3xek: add operation clock options

Bus clocks:132MHz/166MHz, and corresponding Processor clocks

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
DDR2-SRAM: add timer configurations support for 166MHz

This parameters will be improved after the HW team finish the testing.

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
defconfig/at91sama5d3xek: update the default configuration files

Due to adding some PCK and MCK options and LINK Address changing

Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
sama5d3: change the board folder name

Signed-off-by: Josh Wu <josh.wu@atmel.com>