msm: clock: Call regulator_enable/disable when updating vdd

When all clocks on a regulator are disabled, regulator_disable should
be called.  Likewise, when first clock is prepared, regulator_enable
should be called.

Add regulator_enable/disable function during voltage voting.

Change-Id: Id036e95a4807574ae143a83cf0280fd61635257f
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>

Conflicts:

	arch/arm/mach-msm/clock.c
msm: clock: Don't update clk->parent in clk_set_parent()

Any change to the parent field has to be done between __clk_pre_reparent()
and __clk_post_reparent() to avoid race conditions. So, stop setting the
parent field and leave it to the ops->set_parent() implementations to
update the parent field. All current implementations of ops->set_parent()
already do so.

Change-Id: Idc41bee306881a885335ecb322a21509231048cc
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock: Allow set_parent on clocks without the set_parent op

Some use cases require that set_parent succeed on a clock
that actually has just one parent. If a clock doesn't expose
a set_parent op, but the requested parent is the same as the
current parent, return success.

Change-Id: I0cf3f1e6e982de5cc86eb408ca71a62466710ef1
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock: Check that round_rate is less than fmax

HW has maximum frequency requirements. Ensure that the clock frequency
returned from clk_round_rate() is within these limits.

Change-Id: I0d4ed5851fc1f9f76c0ad0622cc6609e64e5311f
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: clock: Add is_better_rate() helper function

The is_better_rate() function is meant for use in clk_round_rate()
implementations to check if one of the new possible rates is better than
the current best match for the round rate request.

Change-Id: Ifca1840b15ec6faf6031af35ca9d219f6b32c3bb
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock-generic: Add support for recursive set parent to mux_clk

When there are a bunch of nested muxes and a consumer calls
clk_set_parent() on the top level mux, it's possible that the consumer
doesn't care if the new parent is an immediate parent to the top level mux
and just wants the output from the new parent. So, recursively search for
the new parent (if recursive set parent is enabled for the mux) and get the
output of the new parent even if it has to go through multiple levels of
consecutive muxes.

Change-Id: Ibf76f11587e7c00fe1d34ce956e5a73c8db73e65
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock-generic: Refactor round rate code

Use helper APIs to simplify div_clk and mux_clk round rate code.

Change-Id: I148e53819f8ec73271d127b92780c7ae231cb126
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock-generic: Update the rate field on mux parent change.

Changing the parent of a mux changes its rate to the rate of the new
parent.  So, update the rate field of the clock when changing the parent of
the clock.

Change-Id: Ib219a5eb025c5bde922eed1864ce5296c7e84a8d
Signed-off-by: Saravana Kannan <skannan@codeaurora.org>
msm: clock-generic: Introduce an ext_clk clock type

Some clock controllers have input clock signals from
other clock controllers or hardware blocks. To model
these exterior signals, introduce an ext_clk type that
just passes requests to its parent clock. The clock
controller using the ext_clk type will have to do a
clk_get to get a handle to the external clock, and set
that as the parent on the ext_clk clock.

Change-Id: I762f7b4663d5a55d95e5d3b6808004b77b58e2da
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Reorganize divider clock parameters

Move some common parameters used by the div_round_rate() into a new
struct. This will allow other clock types to reuse this function.

Conflicts:

        arch/arm/mach-msm/clock-mdss-8974.c

Change-Id: Ic9247fb2b9acdf56523fdda76d15dfe829d72af0
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Return best parent_rate from div_round_rate

Returning only the rounded rate and corresponding divider is not
sufficient. Since these values must be represented as integers, rather
than fractions, their product may not be equal to the actual parent
clock rate necessary.

Change-Id: I16a18595baa6f12d3fb3f7379acc80ee3988b2a3
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: clock-generic: Add get_rate op for ext clocks

The ext clock type may sometimes need to report the
rate of its parent. Add the get_rate op to allow this.

Change-Id: Id22e6a52aa36422fe4583d9c062a962f3399b6c4
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-8610: Switch camera muxes to generic mux implementation

The camera mux implementation used ops in clock-local2
written specifically for the 8610 camera mux clocks.
Switch to the more generic mux implementation in the
clock-generic library, and delete the 8610 specific
implementation.

Change-Id: I52da122ab46f6de51ad23fbd64398e5a3347d350
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Allow separate enable/mux-select registers

Some muxes may have independent registers to control
mux selection and enable/disable. Add an additional
field to the mux clock struct to support this.

Change-Id: I436ca0ba48d186fb76d4e5585be4dd1f41fe7739
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Move mux_reg_ops to clock-local2

To keep clock-generic generic, move the mux_reg_ops to
clock-local2, since clock-generic is really not meant
to touch hardware directly.

Conflicts:

        arch/arm/mach-msm/clock-local2.h

Change-Id: Ic2ffd2383c1a8a82efaa5e6c5b2185039a30259a
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Add a get_rate op for slave dividers

Clk_get_rate on slave dividers currently returns the cached
rate. However, in case of some fixed dividers, the parent
rate may change without set_rate ever being called on the
slave divider clock. Therefore, add a get_rate op that
divides the parent clock rate and returns the result.

Change-Id: I94dbd7238b3cd4538f8ffaea6a1a146b4432704c
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-generic: Add a combined mux_div clock

This new clock type is intended to handle certain special cases which
cannot be implemented with the existing mux and divider clock types.

Hardware may support switching both the parent clock and the divider
at the same time. This avoids generating intermediate frequencies from
either the old parent clock and new divider or new parent clock and old
divider combinations.

Extend the "safe parent" concept of the mux clock to a "safe freq".
"safe freq" is guaranteed to be within the fmax requirements for the
lowest voltage level, so it is safe to switch to at any time. It must be
defined when one of the parent clocks must be disabled in order to switch
rates.

Change-Id: I0163be99f2d14b38ce2c2d885df4d68e5c564dde
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
msm: pm-8x60: Use generic clk apis during power collapse

The power management code calls in acpuclk code directly to switch to a
always on clock source during power collapse there by turning off the
HFPLL during any power collapse. The Krait clock management is switching
to use clocks ops model. To necessitate the change, the power management
code will register for CPU/L2 clock sources and disables the
corresponding clocks during power collapse.

Add a DT node to indicate if the clock sources are synchronized across
the cores/L2, to prevent querying on clock sources that might not be
available on certain targets. Also, clk_get() doesn't currently support
deferred probe, change the compile order to include pm-8x60 after clocks
driver to ensure that clock drivers get probed before pm-8x60.

Change-Id: I671296064dda93f1d2226e6ae059d827c4c00890
Signed-off-by: Mahesh Sivasubramanian <msivasub@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
msm: clock-mdss-8974: Set min/max div for fixed divider clocks

Fixed dividers in mdss might not be handed off successfully during
init. Add in min/max_div field to make sure clk_round_rate will
still work correctly even if handoff fails.

Conflicts:

	arch/arm/mach-msm/clock-mdss-8974.c

Change-Id: I9f539a35c44455e748bc47ccef4b482f535d9ebf
Signed-off-by: Junjie Wu <junjiew@codeaurora.org>
Signed-off-by: Vikram Mulukutla <markivx@codeaurora.org>
clock-mdss-8974: Switch HDMI clocks to use the new PLL implementation

This change cleans up the HDMI VCO/PLL implementation. It implements
the HDMI VCO clock and uses generic div and mux clocks to align to
the HDMI PLL architecture.

CRs-Fixed: 456315
Change-Id: I19ef344aafc954935cd6d236f3725bf168658ec9
Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>