Major additional test cases and improvements for the cards, slots and subdevices.

components/Makefile    - add a new test component for 16 bit output
components/bias_16.hdl - a new test component for 16 bit output
core/util/assembly/src/OcpiUtilAssembly.cxx: allow signal mapping in instances
hdl/assemblies/patternbias/Makefile: add more containers for testing
hdl/assemblies/patternbias/patternbias.xml: use bias_16 for test cases.
hdl/cards/Makefile: allow building this library even when there are no components in it.
hdl/cards/specs/fmc_hpc.xml: fix a few signal directions
hdl/cards/specs/fmc_lpc.xml: ditto
hdl/cards/specs/lime-zipper-fmc.xml: more comments, lime_rx signals
hdl/devices/lime_tx.hdl/lime_tx.vhd: add raw props passthrough
hdl/primitives/platform/platform_pkg.vhd: comments
tools/cdk/include/lib.mk: support component libraries with no components yet
tools/ocpigen/include/assembly.h: new mapping class
tools/ocpigen/include/hdl-card.h: move signal map to base class
tools/ocpigen/include/hdl-config.h: record parent of required devices
tools/ocpigen/include/hdl-container.h: add method
tools/ocpigen/include/hdl-device.h: fix signal mapping from devices to boards
tools/ocpigen/include/hdl-slot.h: improve slot signal overrides
tools/ocpigen/include/hdl.h: add endian attributes
tools/ocpigen/include/ocp.h: change signal names to std::string
tools/ocpigen/include/ocpigen.h: change more names to std::string, better signal map classes
tools/ocpigen/include/wip.h: add separate map class to signals list
tools/ocpigen/include/assembly.h: improve the instance-type enum
tools/ocpigen/src/assembly.cxx: ditto
tools/ocpigen/src/hdl-assembly.cxx: ditto, and better clock handling and external signal mapping
tools/ocpigen/include/wip.h: improve the worker type enum
tools/ocpigen/src/data.cxx: allow datavaluegranularity to be overridden
tools/ocpigen/src/dev.cxx: fix input/output signal presence logic
tools/ocpigen/src/hdl-card.cxx: use Board base class shared with platforms
tools/ocpigen/src/hdl-config.cxx: implement subdevices/ share HdlHasDevInstances with container
tools/ocpigen/src/hdl-container.cxx: ditto, and external signal mapping
tools/ocpigen/src/hdl-device.cxx: handle/parse signal mapping incl individual indexed signals
tools/ocpigen/src/hdl-platform.cxx: worker type, more sharing with hdl-device.cxx
tools/ocpigen/src/hdl-slot.cxx: updated signal mapping
tools/ocpigen/src/hdl-worker.cxx: clock improvements for containers.
tools/ocpigen/src/hdl.cxx: ditto
tools/ocpigen/src/ocl.cxx: worker types update
tools/ocpigen/src/ocp.cxx: clock signal update
tools/ocpigen/src/parse.cxx: class hierarchy improvements, worker types
tools/ocpigen/src/port.cxx: storage management
tools/ocpigen/src/rcc.cxx: worker types
tools/ocpigen/src/wsi.cxx: clock signal names, data value granularity overrides
hdl/assemblies/patternbias/lime*.xml: container building test cases
git add hdl/cards/README: some commentary on hdl/cards
hdl/devices/lime_rx.hdl/lime_rx.vhd: temporary initial partial implementation for build testing