Convert more SelectionDAG functions to use ArrayRef.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207397 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64]Fix a bug cannot select UQSHL/SQSHL with constant i64 shift amount.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207399 91177308-0d34-0410-b5e6-96231b3b80d8
[inliner] Significantly improve the compile time in cases like PR19499
by avoiding inlining massive switches merely because they have no
instructions in them. These switches still show up where we fail to form
lookup tables, and in those cases they are actually going to cause
a very significant code size hit anyways, so inlining them is not the
right call. The right way to fix any performance regressions stemming
from this is to enhance the switch-to-lookup-table logic to fire in more
places.

This makes PR19499 about 5x less bad. It uncovers a second compile time
problem in that test case that is unrelated (surprisingly!).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207403 91177308-0d34-0410-b5e6-96231b3b80d8
If building with LLVM_ENABLE_DOXYGEN and using CMake then
abort while configuring if doxygen could not be found. This
is desirable because if the build is going to fail then it should
fail as early as possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207404 91177308-0d34-0410-b5e6-96231b3b80d8
Fix very poor compile-time in PR19499 due to excessive tree walks in
domtree. When finding a nearest common dominator, if neither A dominates
B nor B dominates A, we immediately resorted to a tree walk. The tree
walk here is *particularly* expensive because we have to build
a (potentially very large) set for one side's dominators and compare it
with the other side's.

If at any point we have DFS info, we don't need to do any of this. We
can just walk up one side's immediate dominators and return the first
one which dominates the other side. Because of the DFS info, the
dominates queries are trivially constant time.

This reduces the optimizers time in the test case on PR19499 by 70%. It
now optimizes in about 30 seconds for me. And there is still more to be
done for this case.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207406 91177308-0d34-0410-b5e6-96231b3b80d8
Fix rampant quadratic behavior in UpdatePHINodes. The operation of
mapping from a basic block to an incoming value, either for removal or
just lookup, is linear in the number of predecessors, and we were doing
this for every entry in the 'Preds' list which is in many cases almost
all of them!

Unfortunately, the fixes are quite ugly. PHI nodes just don't make this
operation easy. The efficient way to fix this is to have a clever
'remove_if' operation on PHI nodes that lets us do a single pass over
all the incoming values of the original PHI node, extracting the ones we
care about. Then we could quickly construct the new phi node from this
list. This would remove the remaining underlying quadratic movement of
unrelated incoming values and the need for silly backwards looping to
"minimize" how often we hit the quadratic case.

This is the last obvious fix for PR19499. It shaves another 20% off the
compile time for me, and while UpdatePHINodes remains in the profile,
most of the time is now stemming from the well known inefficiencies of
LVI and jump threading.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207409 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Make the return of the IntraSCC removal method actually match its
contract (and be much more useful). It now provides exactly the
post-order traversal a caller might need to perform on newly formed
SCCs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207410 91177308-0d34-0410-b5e6-96231b3b80d8
[LCG] Add the most basic of edge insertion to the lazy call graph. This
just handles the pre-DFS case. Also add some test cases for this case to
make sure it works.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207411 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: diagnose use of v16-v31 in certain indexed NEON instructions.

Someone couldn't bear to have a completely orthogonal set of floating-point
registers, so we've got some instructions that only accept v0-v15 (coming in
ARMv9, V128_prime: you're allowed v2, v3, v5, v7, ...).

Anyway, we were permitting even the out of range registers during assembly
(CodeGen handled it correctly). This adds a diagnostic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207412 91177308-0d34-0410-b5e6-96231b3b80d8
Fix gcc -Wsign-compare warning in X86DisassemblerTables.cpp.

X86_MAX_OPERANDS is changed to unsigned.

Also, add range-based for loops for affected loops. This in turn
needed an ArrayRef instead of a pointer-to-array in
InternalInstruction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207413 91177308-0d34-0410-b5e6-96231b3b80d8
Produce an error instead of a crash in an expr we cannot represent.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207414 91177308-0d34-0410-b5e6-96231b3b80d8
List the entire symbol table in this test.

This will allow us to extend this test to show that other symbols don't
show up in the symbol table.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207418 91177308-0d34-0410-b5e6-96231b3b80d8
Don't include an invalid symbol in the symbol table.

The symbol table itself has no relocations, so it is not possible to represent
things like

a = undefined + 1

With the patch we just omit these variables. That matches the behaviour of the
gnu assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207419 91177308-0d34-0410-b5e6-96231b3b80d8
ARM: stop passing unused values up the TableGen hierarchy.

It's bad enough that I have to look up 5 different levels of TableGen class
definitions to work out what bits go where in a simple NEON instruction anyway,
without having to keep track of umpteen unused parameters.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207420 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify isLocal().

No functionality change.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207421 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64] Fix an issue where we were always assuming a copy was coming from a D subregister.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207423 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify ELFObjectWriter::ExecutePostLayoutBinding.

No functionality change. This removes the last use of AliasedSymbol in
ELFObjectWriter.cpp.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207424 91177308-0d34-0410-b5e6-96231b3b80d8
InstCombine: don't drop 'inalloca' in PromoteCastOfAllocation (PR19569)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207426 91177308-0d34-0410-b5e6-96231b3b80d8
Modify the assertion in DIBuilder.cpp to cover the DWARF 5 languages

Differential Revision: http://reviews.llvm.org/D3523

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207428 91177308-0d34-0410-b5e6-96231b3b80d8
Fix comment


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207429 91177308-0d34-0410-b5e6-96231b3b80d8