Fix non-IEEE mode

Floating-point is complicated...

Some background: Denormals are floats that are too close to zero to be stored in a normalized way (their exponent would need more bits). Since they are stored unnormalized, they are hard to work with, even in hardware.  That's why both PowerPC and SSE can be configured to operate in faster but non-standard-compliant modes in which these numbers are simply rounded ('flushed') to zero.

Internally, we do the same as the PowerPC CPU and store all floats in double format. This means that for loading and storing singles we need a conversion. The PowerPC CPU does this in hardware. We previously did this using CVTSS2SD/CVTSD2SS. Unfortunately, these instructions are considered arithmetic and therefore flush denormals to zero if non-IEEE mode is active. This normally wouldn't be a problem since the next arithmetic floating-point instruction would do the same anyway but as it turns out some games actually use floating-point instructions for copying arbitrary data.

My idea for fixing this problem was to use x87 instructions since the x87 FPU never supported flush-to-zero and thus doesn't mangle denormals. However, there is one more problem to cope with: SNaNs are automatically converted to QNaNs (by setting the most-significant bit of the fraction). I opted to fix this by manually resetting the QNaN bit to its original value.

I haven't done any performance testing yet of the QNaN reset code yet. According to Intel, mixing float and integer SSE instructions carries some performance penalty.

Thanks to @phire for pointing out both pitfalls.