hdl/modules/fmc_adc_common/*: add option to disable bufmr

On 7-SERIES FPGAs, we need to explicitily instantiate a
BUFMR primitive in order to use a MRCC pin as a drive to
a Multi-Region BUFR or BUFIO. Now, we can select which ones
of used clocks are LOCed to MRCC pins and which ones
are not.
hdl/top/afc_v1: add new top files for the AFCv1 board

Warning: MAP and PAR can take a long time due to
poor placement of the GTP tranceiver for the PCIe
core
hdl/syn/afc_v1: add new syn file for the AFCv1 board