ARM: zynq: Implement better check for DDR idle

In suspend DRAM is put in self-refresh and clocks are stopped. Though,
before the clocks can be stopped the DDRC must be idle. Zynq does not
provide a reliable way to query the activity state of the DRAM. The
recommened way is to poll the CAM queues and wait for ~40 DDR cycles
once they are idle to allow the queues and pipelines to be drained.

If something causes new DDR transactions in the gap between finish
polling and turning DDR off, things will go sideways...

Tested-by: Chandramohan Pujari <cpujari@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Micro-optimize suspend code

Use options to dsb/dmb explicitly.
Optimize some conditional execution.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: xilinx_zynq_defconfig: Enable XADC driver

The XADC driver vanished from the defconfig when we migrated to the
mainline driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx: Use standard num-cs binding

Use standard num-cs binding property and setup
"xlnx,num-ss-bits" as deprecated.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
devicetree: Add Xilinx SPI bindings documentation

Add Xilinx SPI bindings documentation

Signed-off-by: Jason Wu <huanyu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Define all register offset via an enum

This patch defines all the register offsets via an
enum.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Add big endian support

This patch adds support for the big endian version of
soft IP CAN.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Include tx,rx fifo depth

This patch includes the tx,rx fifo depths in ZYNQ CANPS
case and also it uses the proper txfifo depth value while
allocating the memory for the device(alloc_candev).

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Use clock names specified in the datasheet

Used the clock names specified in the IP datasheet.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Code cleanup in transmit side

This patch cleans up the redundant code in the
transmit side.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Code cleanup in rx side

This patch cleans up the redundant code in the
receive side.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Always update error stats

if the allocation of the error skb fails, users still want to see
the error statistics.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Remove #ifdef CONFIG_PM_SLEEP and used __maybe_unused

Removed #ifder CONFIG_PM_SLEEP and use __maybe_unused instead.
and also use dev_get_drvdata() instead of container_of Macro.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
can: xilinx: Code cleanup

The code cleanup includes
- Enabling the clock when the interface is up to reduce the
Power consumption.
- use the names xcan_chip_start/xcan_chip_stop instead of xcan_start/xcan_stop
to sink up with other driver naming in the opensource.
- Remove unnecessary debug prints.
- cleans up the redundant code in the driver.
- request the interrupt on in the open() function.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
usb: host: Remove ifdef CONFIG_PM_SLEEP and replace it by maybe_unused

The best is to compile the whole code.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Consolidate prefetch options

Only provide one option to enable/disable prefetching. Chances are you
want it all or not at all.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Fix prefetch option

This fixes two issues with prefetching.

1. The FSBL enables prefetching, at least on one core. I.e. Linux should
disable the prefetching if the option is not selected in Linux.

2. Enabling prefetching was a late_initcall which is not part of the
hotplug path. When a CPU got unplugged the prefetching bits got not set
again.

This is fixed by modifying the code to set/clear the prefetching bits
depending on the kernel config and calling the code also from the
hotplug path.

Reported-by: Edward Yang <edwardy@xilinx.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm: zynq: Don't use arm_global_timer with cpufreq

The timer frequency of the arm_global_timer depends on the CPU
frequency. With cpufreq altering that frequency the arm_global_timer
does not maintain a stable time base. Therefore don't enable that timer
in case cpufreq is enabled.

Cc: Russell King <linux@arm.linux.org.uk>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
(cherry picked from commit 61f1fc7e9258a169ac8afb5ddf657a181e60d052)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Make of_device_id array const

Make of_device_id array const, because all OF functions handle
it as const.

Signed-off-by: Jingoo Han <jg1.han@samsung.com>
Acked-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
edac: zynq: Make of_device_id array const

Make of_device_id array const, because all OF functions handle
it as const.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>