Plug unnecessary binvp NULL initialization and test.

Reported by: Coverity
CID: 1018889
The imx6 hardware is fast enough to make good use of however much
timecounter resolution is available, so ask for a 1 GHz frequency.  It
won't actually get one that fast, but that'll get the fastest available
clock and use a divisor of 1 (probably 132 or 66mhz on current hardware).
Attach the imx6 CCM driver during BUS_PASS_CPU.  It controls the clocks
for most on-chip devices and needs to be available before other drivers
start attaching and asking to have their clocks enabled.
Fix a race in pmap_emulate_accessed_dirty() that could trigger a EPT
misconfiguration VM-exit.

An EPT misconfiguration is triggered when the processor encounters a PTE
that is writable but not readable (WR=10). On processors that require A/D
bit emulation PG_M and PG_A map to EPT_PG_WRITE and EPT_PG_READ respectively.

If the PTE is updated as in the following code snippet:
	*pte |= PG_M;
	*pte |= PG_A;
then it is possible for another processor to observe the PTE after the PG_M
(aka EPT_PG_WRITE) bit is set but before PG_A (aka EPT_PG_READ) bit is set.

This will trigger an EPT misconfiguration VM-exit on the other processor.

Reported by:	rodrigc
Reviewed by:	grehan
MFC after:	3 days
It seems multicast filtering of RTL8168F does not work.  Workaround
the silicon bug by accepting any multicast packets.

PR:	193488
MFC After:	1 week
cxgbetool: Catch up with r185979.  One of MAP_ANON, MAP_PRIVATE,
MAP_SHARED, or MAP_STACK must be specified.

This fixes the "loadfw" subcommand.

MFC after:	1 week