[ARM] vgic: Map CPU interface registers for upcoming irq routing

For routing physical interrupts to guest, we would require to exploit
the EOImode to de-prioritize physical interrupts and de-activate
physical interrupts from guest using HW bit of GICH_LRx registers.

To do the above, we would require to access GICC_EOI and GICC_DIR
register from VGIC driver hence this patch is a preparatory patch
for upcoming irq routing in VGIC.

Signed-off-by: Anup Patel <anup@brainfault.org>