pass the tests on modelsim
meet all timing constraint at 200MHz
change LDIL (core)
change some signal name
Merge remote-tracking branch 'origin/developer' into emak

Merge remote-tracking branch 'origin/developer' into emak
pass fib_rec.s on modelsim
contains I/O bugs
add convbin from https://github.com/b-inary/cpuex
change implementation of read functions to read binary
work on cmopiler
fix io bug
modify min-rt.ml to support binary mode
modify preprocess.py
Merge remote-tracking branch 'origin/aiueo' into wtr816
Merge remote-tracking branch 'origin/aiueo' into wtr816
Merge remote-tracking branch 'origin/aiueo' into wtr816
fix fug of finv
library for native option
rename boot loader
how to compile