[CORE] net: Refurbish netswitch software bridge

The software bridge is our default netswitch policy that is
always compiled with our core packet switching framework.

This patch does cleanups and simplifies the software bridge
implementation so that its more readable and easy to maintain.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Rename default bridge instance to br0

All supported ARM host have DTS files creating a default vmm_netswitch
named "netbridge0" which is nothing but a software bridge.

In Linux world, software bridges are typically named "br0", "br1"
and so on.

For easy in understanding, we will name vmm_netswitch instances with
software bridge policy as "br0", "br1", and so on.

As per above rationale, we rename "netbridge0" to "br0" in DTS files of
various ARM hosts.

Signed-off-by: Anup Patel <anup@brainfault.org>
[ARM] Introduce common defterm for all ARM hosts

We have quite few boards sharing same serial port. Also, in
future we would like to have a unified arch_defterm_xxx()
functions which behaves based on serial port selected by DTB.

This patch unifies all board specific arch_defterm_xxx() into
one common defterm implementation.

Signed-off-by: Anup Patel <anup@brainfault.org>
[TESTS] Add generic timer for VExpress-A15 basic firmware.

We should be using generic timer in basic firmware for host
having virtualization extension and generic timers.

For now, we only have VExpress-A15 Guest and Virt-v8 Guest
with generic timer but we were not using generic timer for
basic firmware on VExpress-A15 Guest hence this patch.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] Make reset and shutdown board independent

Having arch_board_reset() and arch_board_shutdown() forces
reset and shutdown operations to be board specific which is
not always true because some host might have reset & shutdown
as part of some device or watchdog or timer or GPIO or ...

To make reset and shutdown more flexible we provide APIs for
registering reset and shutdown callbacks.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_host_irq: Simplify required architecture dependencies

This patch reduces dependency of vmm_host_irq on architecture code.

It does the following changes:
1. Removes ARCH_HOST_IRQ_COUNT instead introduces arch specific
   menuconfig option named CONFIG_HOST_IRQ_COUNT
2. Removed arch_host_irq_active() instead introduced
   vmm_host_irq_set_active_callback() to register a callback
   which can be used by PIC code to provide a function for
   determining current active irq.
3. Removed per board arch_host_irq.h from everywhere

Due to the above change we have reduced lot of duplicate code
from ARM board suppports. We now require only arch_host_irq_init()
from architecture code.

Also, in future this will help us have a generic DTB based board for
wide range or ARM boards.

Signed-off-by: Anup Patel <anup@brainfault.org>
[x86] Move generic mmu code to seperate file.

The generic mmu code can be reused for guest handling
so move that in a seperate file.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Fix atomic operations for x86

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
[x86] Move common x86 files under common directory.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[x86] Increase the boot page table size.

Since the VAPOOL moved to 16MB from 8MB, the boot
page tables need to be increased too. Currently this
was the reason of actual machines not coming up with
current Xvisor.

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[x86]  Add support for board reset via keyboard.

We don't enable the ACPI yet on x86 but only parse
the tables. Until that is enabled and tested, the
reset is via the keyboard which toggles the CPU
reset pin. So this is not a board reset per se...

Signed-off-by: Himanshu Chauhan <hschauhan@nulltrace.org>
Acked-by: Anup Patel <anup@brainfault.org>
[CORE] Generic plugable load balancer

This patch introduces a generic load balancer which in itself
does no load balancing but we can plug vmm_loadbal_algo instances.

The generic load balancer will select best rated vmm_loadbal_algo
instance and use that for doing load balancing.

People can now write their own proprietary or open source load
balancing algorithm and plug this at runtime.

Please note that built-in load balancing algorithm will have to
be GPL because it will be linked directly with Xvisor binary which
is GPL.

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVES] usb: Simplify root hub polling

We treat root hub in the same manner as normal hubs and expect
HCD driver to provide complete emulation of root hub.

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Make clkdev.h xvisor specific

We have ported version of clk/clkdev.c hence the interface header
has to be xvisor specific drv/clkdev.h

Also, for linux compatibility we have linux/clkdev.h which simply
includes drv/clkdev.h

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] clk: Explicitly export symbols

Just like MMC and other driver frameworks explicitly export
symbols for lookup clock APIs even if it is always built-in.

Signed-off-by: Anup Patel <anup@brainfault.org>
[LIBS] libfdt: Don't access attr->value directly

The FDT parsing code directly accesses 'struct vmm_devtree_attr' member
'value' directly when parsing node properties. This not consistent with
other parts of Xvisor hence this patch updates FDT parsing accordingly.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_devtree: Remove obsolete cpu_freq_mhz attribute

The cpu_freq_mhz attribute is no longer used anywhere.

Signed-off-by: Anup Patel <anup@brainfault.org>
[CORE] vmm_devtree: Add phandle parsing APIs

This patch primarily adds phandle parsing APIs to
device tree framework. The phandle APIs will be
used to implement common device tree based clocking
framework in drivers. In future, it will be also
used for GPIO and PINCTRL driver frameworks.

In addition to above, this patch also does:
1. Reorganize functions in vmm_devtree based on
   dependency on each other.
2. Add vmm_devtree_attrval_match_string() and
   vmm_devtree_attrval_count_strings() APIs

Signed-off-by: Anup Patel <anup@brainfault.org>
[DRIVERS] Refurbish clocking interface for drivers

The clocking interface (i.e. arch_clk.h) is totally optional for
architectures (e.g. x86 will probably never use it) and there is
also generic device tree based clocking framework possible for
all architectures. Due to this facts, arch_clk.h is not right
place for defining clocking interface instead we rename this to
drivers/include/drv/clk.h.

In addition to above, this patch also does following changes:
1. Improve clock lookup APIs (clkdev) and make it linux like
2. Use clock lookup APIs for realview-eb-mpcore, realview-pb-a8,
   VExpress-A9 and VExpress-A15 hosts
3. Add openconf option and stubs for up-coming commong device
   tree based clocking framework

The above changes not only refurbishes our clocking interface but
also brings it more closer linux clocking interface hence enabling
us to provide linux-like linux/clk.h and linux/clkdev.h.

Signed-off-by: Anup Patel <anup@brainfault.org>
[LIBS] list: Add support hlist (hash table list) APIs

This patch add linux-like hlist APIs for ease in implementing
hash table bucket lists.

hlist is just a double linked lists with a single pointer list head
so that single pointer list head can be used to point to a hash table
bucket list. Of course, hlist will be not as efficient as dlist because
we don't have O(1) access to hlist tail element.

Signed-off-by: Anup Patel <anup@brainfault.org>