[mips] Update tests with encoding information for slt, slti, sltiu and sltu.

Summary:
Also renamed non-portable register names (e.g. $t2) so that we don't end up
with a different encoding for what appears to be an equivalent instruction.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3505

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207655 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Fix MipsLongBranch pass to work when the offset from the branch to the
target cannot be determined accurately. This is the case for NaCl where the
sandboxing instructions are added in MC layer, after the MipsLongBranch pass.
It is also the case when the code has inline assembly. Instead of calculating
offset in the MipsLongBranch pass, use %hi(sym1 - sym2) and %lo(sym1 - sym2)
expressions that are resolved during the fixup.

This patch also deletes microMIPS test file test/CodeGen/Mips/micromips-long-branch.ll
and implements microMIPS CHECKs in a much simpler way in a file
test/CodeGen/Mips/longbranch.ll, together with MIPS32 and MIPS64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207656 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add instruction alias (sll and srl).

Summary:
The pattern sll/srl $rd, $rt, $rs is found in handwritten assembly which
is just a shorthand version of sllv/srlv $rd, $rt, $rs.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3483

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207657 91177308-0d34-0410-b5e6-96231b3b80d8
Rename the test, it is testing the symver directive.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207658 91177308-0d34-0410-b5e6-96231b3b80d8
[ARM64][fast-isel] Fast-isel doesn't know how to handle f128.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207659 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Teach moveToVALU how to handle some SMRD instructions

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207660 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Use VALU instructions for copying i1 values

We can't use SALU instructions for this since they ignore the EXEC mask
and are always executed.

This fixes several OpenCV tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207661 91177308-0d34-0410-b5e6-96231b3b80d8
Relax the test a bit.

It is not relevant where the symbol and section names are stored, just their
values.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207662 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a use of uninitialized memory in SmallVector's move-assignment operator.

When we were moving from a larger vector to a smaller one but didn't
need to re-allocate, we would move-assign over uninitialized memory in
the target, then move-construct that same data again.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207663 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add instruction alias (dsll and dsrl).

Summary:
The pattern dsll/dsrl $rd, $rt, $rs is found in handwritten assembly which
is just a shorthand version of dsllv/dsrlv $rd, $rt, $rs.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3486

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207664 91177308-0d34-0410-b5e6-96231b3b80d8
IR: Alloca clones should remember inalloca state

Pretty straightforward, we weren't propagating whether or not an
AllocaInst had 'inalloca' marked on it when it came time to clone it.

The inliner exposed this bug.  A reduced testcase is forthcoming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207665 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: accept and print floating-point immediate 0 as "#0.0"

It's been decided that in the future, the floating-point immediate in
instructions like "fcmeq v0.2s, v1.2s, #0.0" will be canonically "0.0", which
has been implemented on AArch64 already but not ARM64.

This fixes that issue.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207666 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: add specific diagnostic for MRS/MSR and enable tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207667 91177308-0d34-0410-b5e6-96231b3b80d8
AArch64/ARM64: implement remaining TLS relocations (purely MC).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207668 91177308-0d34-0410-b5e6-96231b3b80d8
ARM64: print fp immediates without using scientific notation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207669 91177308-0d34-0410-b5e6-96231b3b80d8
ELFObjectWriter: deduplicate suffices in strtab

We already do this for shstrtab, so might as well do it for strtab. This
extracts the string table building code into a separate class. The idea
is to use it for other object formats too.

I mostly wanted to do this for the general principle, but it does save a
little bit on object file size. I tried this on a clang bootstrap and
saved 0.54% on the sum of object file sizes (1.14 MB out of 212 MB for
a release build).

Differential Revision: http://reviews.llvm.org/D3533

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207670 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add instruction alias (sltu).

Summary:
The pattern sltu $r1, $r2, $imm is found in handwritten assembly which
is just a shorthand version of sltui $r1, $r2, $imm.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3508

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207671 91177308-0d34-0410-b5e6-96231b3b80d8
[mips] Add instruction alias (negu).

Summary: negu $reg is equivalent to negu $reg, $reg.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D3510

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207673 91177308-0d34-0410-b5e6-96231b3b80d8
Simplify ELFObjectWriter::SymbolValue.

It now defers all offset computation to getSymbolOffset.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207674 91177308-0d34-0410-b5e6-96231b3b80d8
IR: Conservatively verify inalloca arguments

Summary: Try to spot obvious mismatches with inalloca use.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D3572

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@207676 91177308-0d34-0410-b5e6-96231b3b80d8