arch: initial framework for supporting other architectures added.

x86: all platforms moved into x86 directory

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
x86: move x86 platform include files into own directory

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
arm: add initial skeleton for arm platform support

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
raspberry pi: add model b definition

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
arm: use raspberry pi platform

As it is the only currently supported ARM platform. It defaults to RPi

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
raspberry pi: add doc for model b

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
docs: add Raspberry Pi ref to docs/index.md

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
raspberry pi: correct bus definitions

They needed offsetting by +1, due to starting the config at 1 instead of
0 as it was during development

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
mraa.c: check already initialised before anything else in mraa_init

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
binding.gyp.cmake: define *PLAT based on target_platform

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
mraa.i: remove comments breaking builds with SWIG 3.0.3

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
binding.gyp.cmake: fix architecture name for 32bit x86

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
mraa.c: fix error handling & leak in mraa_setup_mux_mapped

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
intel_edison_fab_c.c: ignore failed tristate writes when doing direction set

Signed-off-by: Brendan Le Foll <brendan.le.foll@intel.com>
doc/spi: correct description of SPI

SPI is not System Package Interface

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
x86/edison: only toggle tristate on physical pins

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>
x86/galileo-gen2: correct SPI MOSI mux info

Fixes #67

Signed-off-by: Thomas Ingleby <thomas.c.ingleby@intel.com>