only compile one shared library for MehariVHDLPasses (same change as for MehariVHDLPasses)
split *.incl.cpp files into *.h and *.cpp
fix generate-ir-code-for-example.sh (broken because of renamed library)
add "-Wall -Werror" for VHDL generator and fix all errors and warnings
add generator for ReconOS FSM
ReconOS wrapper works for more than one calculation in a row
Merge branch 'master' into add-vhdl-generator
add dummy VHDLBackend::generateSelect method to make it compile
Extract test helpers from SimpleVHDLGeneratorTest
use UnittestHelpers (esp. ParseC) for SimpleCCodeGeneratorTest