Add SPI interface to SpiNNaker FPGAs for BMP-driven debug.

This branch adds an SPI interface and also a new pair of register bank registers for each HSS Multiplexer. 

The value written to `IDSO_REG` (IDle Sentinel Output value) is included as part of the idle frames sent when no other frames are due. When such idle frames are received, `IDSI_REG` (IDle Sentinel Input value) is set to the value of this field. This mechanism acts as a very crude method of identifying remote devices for diagnostic purposes, in particular for verifying wiring in large systems: each link is simply assigned a unique value in `IDSO_REG` and then `IDSI_REG` is read from every device to determine the connectivity. This feature also serves to verify the ability to write register bank values from SPI...

Though the correct solution would be to develop a reliable out-of-band signalling channel, this would require some substantial work and is likely to be something I develop at a later stage.