ARM: sunxi: select ARM_PSCI

This is necessary for SMP on sun7i.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
reset: Add of_reset_control_get

In some cases, you might need to deassert from reset an hardware block that
doesn't associated to a struct device (CPUs, timers, etc.).

Add a small helper to retrieve the reset controller from the device tree
without the need to pass a struct device.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
clocksource: sun5i: Add support for reset controller

The Allwinner A31 that uses this timer has the timer IP asserted in reset.
Add an optional reset property to the DT, and deassert the timer from reset if
it's there.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
ARM: sun6i: a31: Add support for the High Speed Timers

The Allwinner A31 has support for four high speed timers. Apart for the
number of timers (4 vs 2), it's basically the same logic than the high
speed timers found in the sun5i chips.

Now that we have a driver to support it, we can enable them in the
device tree.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
clk: sunxi: Allwinner A20 output clock support

This patch adds support for the external clock outputs on the
Allwinner A20 SoC. The clock outputs are similar to "module 0"
type clocks, with different offsets and widths for clock factors.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: external clock outputs

This commit adds the two external clock outputs available on A20 to
its device tree. A dummy fixed factor clock is also added to serve as
the first input of the clock outputs, which according to AW's A20 user
manual, is the 24MHz oscillator divided by 750.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
pinctrl: sunxi: Add Allwinner A20 clock output pin functions

This patch adds the clock output pin functions on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
ARM: dts: sun7i: Add pin muxing options for clock outputs

This patch adds the clock output pin options on the A20.
The 2 pins can output a configurable clock to be used by
external modules. This is used on the CubieTruck, to supply
a 32768 Hz low power clock to the onboard Wifi+BT module.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
input: Add new sun4i-ts driver for Allwinner sunxi SoC's rtp controller

Note the sun4i-ts controller is capable of detecting a second touch, but when
a second touch is present then the accuracy becomes so bad the reported touch
location is not useable.

The original android driver contains some complicated heuristics using the
aprox. distance between the 2 touches to see if the user is making a pinch
open / close movement, and then reports emulated multi-touch events around
the last touch coordinate (as the dual-touch coordinates are worthless).

These kinds of heuristics are just asking for trouble (and don't belong
in the kernel). So this driver offers straight forward, reliable single
touch functionality only.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
input: sun4i-ts: Add support for temperature sensor

The sun4i resisitive touchscreen controller also comes with a built-in
temperature sensor. This commit adds support for it.

This commit also introduces a new "ts-attached" device-tree property,
when this is not set, the input part of the driver won't register. This way
the internal temperature sensor can be used to measure the SoC temperature
independent of there actually being a touchscreen attached to the controller.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun4i: Add rtp controller node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun5i: Add rtp controller node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun7i: Add rtp controller node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
input: Add new sun4i-lradc-keys driver

Allwinnner sunxi SoCs have a low resolution adc (called lradc) which is
specifically designed to have various (tablet) keys (ie home, back, search,
etc). attached to it using a resistor network. This adds a driver for this.

There are 2 channels, currently this driver only supports chan0 since there
are no boards known to use chan1. The devicetree properties are already
prefixed with chan0 as preparation for chan1 support in the future.

This has been tested on an olimex a10s-olinuxino-micro, a13-olinuxino, and
a20-olinuxino-micro.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun4i: Add lradc node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun5i: Add lradc node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: dts: sun7i: Add lradc node

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: sunxi-clock-reset: rename compat property

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
phy-core: Don't print an error on probe deferral or nodata

Printing an error on probe-deferral clearly is not the right thing to do.
While at it I've also silenced the error in case of -ENODATA, so that
devm_phy_get can be used to get an optional phy without causing errors to
be printed. Alternatively a new devm_phy_get_optional method could be
added for this.

While at it also factor the error handling out of the if ... else ..., as it
is identical in both branches.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
ARM: sunxi: Add driver for sunxi usb phy

The Allwinner A1x / A2x SoCs have 2 or 3 usb phys which are all accessed
through a single set of registers. Besides this there are also some other
magic bits which need poking, which are per phy, but shared between the
ohci and ehci controllers, so these are also controlled from this new phy
driver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>