microblaze: Change libgcc-style functions from lib-y to obj-y

Following precedence set by MIPs:
"[MIPS] Change libgcc-style functions from lib-y to obj-y"
(sha1: f7c2778151f32581ea9ec567d01d5d85209fcfe6),
switch the goal definition for kbuild to obj-y to ensure
object files linked in vmlinux if only modules were users
of these functions.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
microblaze: Define readq and writeq IO helper function

Some drivers check if readq/writeq functions are defined.
If not internal driver functions are used which cause
compilation failures.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
microblaze: Fix sparse warning because of missing cpu.h header

Warning:
arch/microblaze/kernel/process.c:164:6: warning: symbol 'arch_cpu_idle'
was not declared. Should it be static?

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
microblaze: Enable pselect6 syscall

Enable this syscall.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
xilinx_axienet: Enable 1000BaseX Phys with axi driver

1000BaseX Phys also communicate with GMII. Enable this when setting up
the driver.

Signed-off-by: Will Wykeham <will@wykeham.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: DT: Replace 'pmbus' with actual vendor

PMBus bindings apparently work more or less independent of the vendor
prefix. Hence, use the proper vendor prefix instead of 'pmbus' for the
UCD hardware monitors.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
trafgen: xilinx: Update the driver sysfs entires with sysfs_create_group()

This patch updates the driver sysfs entires with sysfs_create_group().

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
trafgen: xilinx: Fix kernel doc warnings

This patch fixes the kernel doc warnings.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
edac: add support for ARM PL310 L2 cache parity

Add support for ARM Pl310 L2 cache controller parity error

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: osd: Add the OSD_MAX_ALPHA value

Add the OSD_MAX_ALPHA value. This defines the fixed max alpha value of OSD
for 8 bit video component width. The better way to handle this by having
the video component width property in OSD DT node, and configuring
the value based on those properties.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: plane: Add properties for z-order and alpha values

When OSD is available, the z-order and alpha values for each plane
can be configured. This patch exposes those using drm properties for planes,
except for the CRTC's private plane. Applications can configure the z-order
and global alpha values for each plane. The layer priority should be unique,
so the layers are sorted by z-position, and the priorities are reassigned
when needed.

xilinx_drm_plane_set_zpos() and xilinx_drm_plane_set_alpha() can be
used externally by the CRTC driver to configure its private plane.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: crtc: Add properties for z-order and alpha values

This patch adds z-order and alpha properties for CRTC. Those properties
are configured using the private plane of CRTC and the xilinx drm
plane functions. The properties are available when there are multiple
layers.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: cresmaple: Use of_match_node()

Check the given node if it matches the compatible string.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: osd: Use of_match_node()

Check the given node if it matches the compatible string.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: rgb2yuv: Use of_match_node()

Check the given node if it matches the compatible string.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: vtc: Use of_match_node()

Check the given node if it matches the compatible string.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: connector: Do not include adv7511.h

Do not include adv7511.h in the connector, as it's not used.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
drm: xilinx: plane: Remove an unused arg of xilinx_drm_plane_mode_set()

In xilinx_drm_plane_mode_set(), struct drm_crtc is never used, so
the argument is removed from the function prototype.

Signed-off-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Set bit 22 in the PL310 cache controller auxctlr register

This patch is based on the below commit
"ARM: 6395/1: VExpress: Set bit 22 in the PL310 (cache controller) AuxCtlr
register"
(sha1:1a8e41cd672f894bbd74874eac601e6cedf838fb)

Clearing bit 22 in the PL310 Auxiliary Control register (shared
attribute override enable) has the side effect of transforming Normal
Shared Non-cacheable reads into Cacheable no-allocate reads.

Coherent DMA buffers in Linux always have a Cacheable alias via the
kernel linear mapping and the processor can speculatively load cache
lines into the PL310 controller. With bit 22 cleared, Non-cacheable
reads would unexpectedly hit such cache lines leading to buffer
corruption.

Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
SPI: zynq: Corrected upper limit for baud_rate_val in loop

In the loop where baud rate divisor value to be written to the
config register is calculated, the check was "baud_rate_val < 8"
which resulted in baud rate divisor field being set to '000'
which is invalid. Changed check to "baud_rate_val < 7".

Reported-by: Thomas Betker <thomas.betker@rohde-schwarz.com>
Reported-by: Ted Roth <Ted.Roth@covidien.com>
Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>