ARM: tegra: whistler: Add slave address for i2c driver

Configuring all i2c controller to have slave addresss to 0xFC
(unused slave address) to avoid responding the slave with general
call address.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91951

Change-Id: Id1a45f46cfc5ffa3a48b01c0bae71c4ee9ab699b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100259
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: ventana: Set drive strength to max for all i2c pins

Setting drive strength to maiximum for all i2c pins.

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91952

Change-Id: I8882dd238af34e06c924f2e160d0897111e8103d
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100260
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: whistler: Set I2c pin drive strength to max

Setting i2c drive strenth to maximum and pulling all pins
to high.
bug 951052
bug 958415
bug 927583

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/91805

Change-Id: Ia2bf4ccba6d4c47411e59fb9567dc4e3c2db76ae
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100261
Reviewed-by: Automatic_Commit_Validation_User
ARM: tegra: enterprise: register supply regulator before child regulator

LDO3 has the input from the VIO output and hence VIO should be
register before LDO3 for regulator registration.

bug 976254

Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/99446

Change-Id: I6771af3e7eb93886e974695ab3550cdf8ebc52c4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100262
Reviewed-by: Automatic_Commit_Validation_User
mfd: tps80031: fix missed irq issue

We found missed irq could be happened if clear all INT_STS_x register in one time.
Shadow register pushes the irq status after the first byte of INT_STS_x was cleared
The proposed way to clear interrupt is to write only one INT_STS_x register.
It will also clear the other two ones.

Bug 952476

Reviewed-on: http://git-master/r/93453
Signed-off-by: Steve Kuo <stevek@nvidia.com>

(cherry picked from commit 0c92f32e9e03defaeac991518b26134e59ef4db6)

Change-Id: I76179be4847f59a1687926b9b0dde6ebd3f58aa4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100306
ARM: tegra2: clock: Put Tegra2 clocks to known states

Add TEGRA_PREINIT_CLOCKS option to put host1x, disp1, and video clocks
into known state, so that L4T Ventana/Harmony works on u-boot.

bug 967065

Change-Id: If7637b13e0daf1823fa0fe694a87870f4601e4df
Signed-off-by: Jong Kim <jongk@nvidia.com>
Reviewed-on: http://git-master/r/95734
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
dmaengine/dma_slave: fix merge issue.

Change-Id: I0931f4ef7a5464dd32d8c703288a137fc77857ce
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/100090
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
arm: tegra: Implement safe option for T30 pinmux

Bug 950086

Change-Id: I2eb129566bfea83b9a73d29f0c6443bdab087b65
Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com>
Reviewed-on: http://git-master/r/95518
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Park <andyp@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
ARM: errata: 716044: an uncacheable load multiple can cause a deadlock.

Under some rare circumstances, an uncacheable load multiple
instruction (LDRD, LDM, VLDM, VLD1, VLD2, VLD3, VLD4) can cause
a processor deadlock.

Change-Id: Ibd79aa8182dce37d0be9892f2310735e1123618a
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95914
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: Enable ARM errata 716044 for Tegra2.

Change-Id: Id71da6f6371f337f913d981f6d121c3fb2561a41
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/95915
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
media: video: tegra: ov5650: read sensor fuse id

The sequence of read fuse id is:

1. write to OTP index register 0x3d00.
2. read out byte from ox3d04.
3. repeat step 1 to the next byte with its index respectively.

also fixed ov5650_read_reg always fail issue.

bug 957657

Change-Id: I649a7765320d0d4be8111a7f523d8487b872b620
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/98330
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wei Chen <wechen@nvidia.com>
Reviewed-by: Frank Chen <frankc@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
ARM: tegra: enterprise: Limit holdoff set for 533MHz

Bug 935079

Signed-off-by: Ray Poudrier <rapoudrier@nvidia.com>
Reviewed-on: http://git-master/r/86009
(cherry picked from commit 83eb3734f76e598d570dd9624e7e06f8b3e05afe)

Change-Id: I5911670e7c1e8dd5fc4e89d4be21b9dcbc4c9085
Reviewed-on: http://git-master/r/98535
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Raymond Poudrier <rapoudrier@nvidia.com>
Tested-by: Raymond Poudrier <rapoudrier@nvidia.com>
video: tegra: host: Clean up includes

Clean up #includes. Replace #includes with forward declarations where
possible, and remove extraneous #includes.

Bug 871237

Change-Id: I6942e0c632b42ad7009589ebdd78def88ae4baa4
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/99046
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
video: early exit from update_cdma

when update_cdma_locked() is invoked, CDMA is not running
implies that the queue is cleared and we can return immediately.

Bug 960487

Change-Id: I599027906dc405f4490590443d4f4d5a3202b5b0
Reviewed-on: http://git-master/r/96650
(cherry picked from commit f297b4812d15540f4b14c87178662a7ca6575ce9)
Reviewed-on: http://git-master/r/99994
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: cardhu: pm299: system wake through tegra gpio

Waking up system through the tegra gpio inplace of ricoh onkey
when using the ricoh based pmu.

bug 978922

Change-Id: If9c5baffa42aca5fcc7d6238c5cf122a136e7760
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/100351
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
arm: tegra: kai: Switch to external temperature sensor

Disable internal temperature sensor and enable external temperature
sensor.

This is a modified version of change
74db6e22d316a95630d3059644fbc55e2620cb9b

Bug 954134

Change-Id: Id64bb93a09e1701165ad1f82e08bb92e61425873
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Reviewed-on: http://git-master/r/96285
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
ARM: tegra: Export tegra_powergate_is_powered()

Export tegra_powergate_is_powered() for use by modules.

Change-Id: I8cfbb8aeb95dca00cbf6ef0c8c2bd189afeb62b6
Signed-off-by: Antti P Miettinen <amiettinen@nvidia.com>
Reviewed-on: http://git-master/r/97724
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>