pinctrl: rockchip: fix non-hiword-mask registers on rk3288

On the rk3288 the pinctrl-related registers do not use the hiword-mask
paradigm (enabling the the corresponding bit for writing by setting
bit x+16 to 1). Instead these registers need common update operations.

In contrast the pull-settings residing in the pmu area on the rk3188 use
the hiword-mask paradigm and from what I heard, future SoCs are supposed
to use the hiword-mask in the complete pmu area, so this will hopefully
stay a one-off issue.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Merge branch '3.14_kernel' of https://github.com/rkchrome/kernel into 3.14_kernel
Merge branch '3.14_kernel' of https://github.com/rkchrome/kernel into 3.14_kernel
dt: update gpu dvfs table for pro1

Change-Id: I51e2a237f5f7895c934d4e9715c3e5ef033eb6b4
dt: update vcc_host, both for vcc_host0, host1

Change-Id: I9e5e7d1d6a7a9688d7067a80a4c3c4515b1302f3