net: gem: Do not probe phy if phy-handle is not setup

Driver doesn't support automatic phy detection
as macb driver that's why don't crash when phy is not found.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Nathan Rossi <nathan.rossi@xilinx.com>
microblaze: Wire-up new system calls sched_setattr/getattr

Wire-up sched_setattr/getattr syscalls.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
tty: serial: uartlite: Specify time for sending chars

Xilinx MDM (Microblaze Debug Module) also contains
uart interface via JTAG which is compatible with
uartlite driver. This interface is really slow
that's why timeout is setup to 1s.

Make this time delay not to be cpu speed dependent.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Use max speed checks in the core

Set master->max_speed_hz to let core perform necessary checks.
Remove checks in the driver.
If transfer speed is requested as zero after checks in the core,
dont set max speed, default to min speed.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Use bits per word checks in core

Set master->bits_per_word_mask. Remove checks in driver.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: irq related cleanup

Request irq after init_hw in probe.
Check for irq<=0 as 0 is also considered error condition.
Return IRQ_HANDLED only when interrupt is handled, otherwise return IRQ_NONE.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Make register read and write operations static inline functions

Make cdns_spi_read and cdns_spi_write static inline functions which
take driver instance pointer, offset, data as inputs and perform necessary
read/write operation.
Modify init_hw function to pass instance pointer instead of register base address.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Use transfer_one hook

Implement transfer_one and set_cs functions. Change initialization, completion
and irq handling accordingly. Remove timeout check as core does this.
Remove reset function as it is no longer used.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: setup cleanup

Make CPOL/CPHA configuration a separate function. Since these dont vary
between transfers and need to be set when preparing hw before enabling spi,
call from prep_transfer_hw.
Remove spi_setup as this is no longer required.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Suspend/Resume cleanup

Remove use of driver state in probe, suspend, resume and prep_transfer_hw.
Just call master suspend/resume and disable_unprepare or prepare_enable clocks
as required in suspend/resume.
Remove debug prints in suspend/resume.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Chip select related changes

Change chip select property name to "num-cs". Use a default value
instead of giving error when num-cs is not found.
Add "is-decoded-cs" property for using extended slave select; make
necessary changes in cdns_spi_chipselect function.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Probe and remove cleanup

Remove unbalanced master_put().
Remove unecessary prints.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Rename remaining_byte and requested_bytes

Rename to tx_bytes and rx_bytes to be clear.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Remove MODULE_ALIAS; add xilinx compatible string too

Remove MODULE_ALIAS.
Add xilinx specific compatible string along with IP compatible string
according to mainline suggestions.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Add ARM dependency

In Kconfig, add ARM dependency because readl/writel_relaxed are used.
Remove dependency on SPI_MASTER as this is already under "if SPI_MASTER".

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Documentation: devicetree: Update spi cadence bindings doc

Add xilinx compatible string along with cadence.
Compatible string should be first in the node.
Make num-cs optional property.
Add is-decoded-cs property.

Signed-off-by: Harini Katakam <harinik@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: cadence: Final syncup with mainline driver

Trivial changes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Remove redundant code from hotplug

When secondary cores are hotplugged, their reset gets asserted and cache
operations are handled in the core. Due to most of the Zynq's
arch-specific hotplug code can be removed.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Remove hotplug.c

Remove hotplug.c and move zynq_platform_cpu_die() to platsmp where all
other SMP ops are defined.
And make zynq_platform_cpu_die static.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: zynq: Rename zynq_platform_cpu_die to zynq_cpu_die

Rename zynq_platform_cpu_die() to zynq_cpu_die()
to match the name of the other Zynq SMP ops.
Also use kernel-doc format to document this function.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>