Add Support to Recognize and Vectorize NON SIMD instructions in SLPVectorizer.

This patch adds support to recognize patterns such as fadd,fsub,fadd,fsub.../add,sub,add,sub... and
vectorizes them as vector shuffles if they are profitable.
These patterns of vector shuffle can later be converted to instructions such as addsubpd etc on X86.
Thanks to Arnold and Hal for the reviews. http://reviews.llvm.org/D4015 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211339 91177308-0d34-0410-b5e6-96231b3b80d8
ArgList: use MakeArgList overloads in subclasses and clean up some calls.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211340 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Trivial subtarget feature cleanups.

Remove an unused AMDIL leftover, correct extra periods
appearing in the help menu.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211341 91177308-0d34-0410-b5e6-96231b3b80d8
ps][mips64r6] Added LSA/DLSA instructions
Differential Revision: http://reviews.llvm.org/D3897


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211346 91177308-0d34-0410-b5e6-96231b3b80d8
Emit the ARM build attributes ABI_PCS_wchar_t and ABI_enum_size.

Emit the ARM build attributes ABI_PCS_wchar_t and ABI_enum_size based on
module flags metadata.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211349 91177308-0d34-0410-b5e6-96231b3b80d8
The count() function for STL datatypes returns unsigned, even where it's
only 1/0 result like std::set. Some of the LLVM ADT already return unsigned
count(), while others still return bool count().

In continuation to r197879, this patch modifies DenseMap, DenseSet, 
ScopedHashTable, ValueMap:: count() to return size_type instead of bool,
1 instead of true and 0 instead of false.

size_type is typedef-ed locally within each class to size_t.

http://reviews.llvm.org/D4018

Reviewed by dblaikie.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211350 91177308-0d34-0410-b5e6-96231b3b80d8
Attempting to fix the 64 bit bots.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211351 91177308-0d34-0410-b5e6-96231b3b80d8
Reverting size_type for the containers from size_type to unsigned. 
Various places in LLVM assume that container size and count are unsigned
and do not use the container size_type. Therefore they break compilation
(or possibly executation) for LP64 systems where size_t is 64 bit while
unsigned is still 32 bit.

If we'll ever that many items in the container size_type could be made
size_t for a specific containers after reviweing its other uses.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211353 91177308-0d34-0410-b5e6-96231b3b80d8
Code in LoopStrengthReduce.cpp depends on SmallBitVector::size() being size_t
and not unsigned.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211356 91177308-0d34-0410-b5e6-96231b3b80d8
Allow a target to create a null streamer.

Targets can assume that a target streamer is present, so they have to be able
to construct a null streamer in order to set the target streamer in it to.

Fixes a crash when using the null streamer with arm.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211358 91177308-0d34-0410-b5e6-96231b3b80d8
Move test so that it is skipped if the ARM target is not enabled.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211366 91177308-0d34-0410-b5e6-96231b3b80d8
[PowerPC] Fix small argument stack slot offset for LE

When small arguments (structures < 8 bytes or "float") are passed in a
stack slot in the ppc64 SVR4 ABI, they must reside in the least
significant part of that slot.  On BE, this means that an offset needs
to be added to the stack address of the parameter, but on LE, the least
significant part of the slot has the same address as the slot itself.

This changes the PowerPC back-end ABI code to only add the small
argument stack slot offset for BE.  It also adds test cases to verify
the correct behavior on both BE and LE.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211368 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add a VALU pattern for i64 xor

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211373 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: SI Control Flow Annotation bug fixed

Mixing of AddAvailableValue and GetValueAtEndOfBlock methods of SSAUpdater
leaded to the endless loop generation when the nested loops annotated.

This fixes a bug in the OCL_ML/KNN OpenCV test.  The test case is too
complex for FileCheck and would be very fragile.

Patch by: Elena Denisova

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211374 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Expand vector fexp2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211375 91177308-0d34-0410-b5e6-96231b3b80d8
R600: Expand vector flog2

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211376 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add a pattern for f32 ftrunc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211377 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Add patterns for ctpop inside a branch

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211378 91177308-0d34-0410-b5e6-96231b3b80d8
[RuntimeDyld] Support more PPC64 relocations

This adds support for several missing PPC64 relocations in the
straight-forward manner to RuntimeDyldELF.cpp.

Note that this actually fixes a failure of a large-model test case on
PowerPC, allowing the XFAIL to be removed.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211382 91177308-0d34-0410-b5e6-96231b3b80d8
Fix a warning about the use of const being ignored with a cast.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211383 91177308-0d34-0410-b5e6-96231b3b80d8