Implement top-level of lsu
Merge branch 'master' into lsu-simple

Conflicts:
	vhdl.xise
Implement mem_queue
Initial implementation of complete lsu
Correct timing issues in mem_control.
Type fix.
Small clarification on active-low.
Document mem_queue_cell.
Work in progress.
Implement lsu with shift register at end.
Remove garbage files.
tests write add imm into lsu_addr
Forgot master
 Tests move and load immediate
SP tests
Merge branch 'master' into lsu-simple

Conflicts:
	vhdl.xise
Merge pull request #35 from dmpro2014/lsu-simple

Lsu simple
Fix error in project file
Fix view association for miscelanellous files.
Merge pull request #34 from dmpro2014/tb_streaming_processor_rebased

Tb streaming processor rebased