Bump version to 3.5.1

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@220990 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r220401:

------------------------------------------------------------------------
r220401 | mail | 2014-10-22 14:18:54 -0400 (Wed, 22 Oct 2014) | 6 lines

test: Make this test runnable in directories with @ in their names

Jenkins likes to use directories with names involving the '@'
character, which breaks the sed expression in this test. Switch to use
'|' on the assumption that it's less likely to show up in a path.

------------------------------------------------------------------------

git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@221390 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r216920:
------------------------------------------------------------------------
r216920 | samsonov | 2014-09-02 18:49:16 +0100 (Tue, 02 Sep 2014) | 4 lines

Fix left shifts of negative values in MipsDisassembler.

This bug was reported by UBSan.

------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222691 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r221408:
------------------------------------------------------------------------
r221408 | petarj | 2014-11-05 22:42:31 +0000 (Wed, 05 Nov 2014) | 9 lines

[mips64] Fix MIPS64 exception personality encoding

Remove dynamic relocations of __gxx_personality_v0 from the .eh_frame.
The MIPS64 follow-up of the MIPS32 fix (rL209907).

Patch by Vladimir Stefanovic.

Differential Revision: http://reviews.llvm.org/D6141

------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222692 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r221453:
------------------------------------------------------------------------
r221453 | tomatabacu | 2014-11-06 14:25:42 +0000 (Thu, 06 Nov 2014) | 17 lines

[mips] Tolerate the use of the %z inline asm operand modifier with non-immediates.

Summary:
Currently, we give an error if %z is used with non-immediates, instead of continuing as if the %z isn't there.

For example, you use the %z operand modifier along with the "Jr" constraints ("r" makes the operand a register, and "J" makes it an immediate, but only if its value is 0). 
In this case, you want the compiler to print "$0" if the inline asm input operand turns out to be an immediate zero and you want it to print the register containing the operand, if it's not.

We give an error in the latter case, and we shouldn't (GCC also doesn't).

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6023
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222693 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r216262:
------------------------------------------------------------------------
r216262 | sstankovic | 2014-08-22 10:23:22 +0100 (Fri, 22 Aug 2014) | 5 lines

[mips] Don't use odd-numbered float registers for double arguments for fastcc
calling convention if FP is 64-bit and +nooddspreg is used.

Differential Revision: http://reviews.llvm.org/D4981.diff

------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222695 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r218745:
------------------------------------------------------------------------
r218745 | dsanders | 2014-10-01 09:26:55 +0100 (Wed, 01 Oct 2014) | 7 lines

[mips] Fix disassembly of [ls][wd]c[23], cache, and pref                          
                                                                                  
Fixes PR21015, and PR20993.                                                       
                                                                                  
Patch by Jun Koi


------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222696 91177308-0d34-0410-b5e6-96231b3b80d8
Merging r217257:
------------------------------------------------------------------------
r217257 | tomatabacu | 2014-09-05 17:32:09 +0100 (Fri, 05 Sep 2014) | 9 lines

[mips] Change Feature-related types from unsigned to uint64_t in MipsAsmParser. No functional changes.

Summary: Found a couple of cases where unsigned was still being used. These two should be the last ones in the (entire) Mips backend.

Reviewers: dsanders

Reviewed By: dsanders

Differential Revision: http://reviews.llvm.org/D5028
------------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@222875 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r214493:

[mips][PR19612] Fix va_arg for big-endian mode.

Summary:
Big-endian mode was not correctly adjusting the offset for types smaller
than an ABI slot.

Fixes PR19612

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: sstankovic, llvm-commits

Differential Revision: http://reviews.llvm.org/D4556



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223007 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r214578:

llvm/test/CodeGen/Mips/cconv/arguments-varargs.ll: Add explicit -mtriple=(mips|mipsel)-linux on 4 lines.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223008 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r215194:

[mips] Initial implementation of -mabicalls/-mno-abicalls.

This patch implements the main rules for -mno-abicalls such as reserving $gp,
and emitting the correct .option directive.

Patch by Matheus Almeida and Toma Tabacu

Differential Revision: http://reviews.llvm.org/D4231



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223009 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r215211:

[mips] Invert the abicalls feature bit to be noabicalls so that it's possible for -mno-abicalls to take effect.

Also added the testcase that should have been in r215194.

This behaviour has surprised me a few times now. The problem is that the
generated MipsSubtarget::ParseSubtargetFeatures() contains code like this:

   if ((Bits & Mips::FeatureABICalls) != 0) IsABICalls = true;

so '-abicalls' means 'leave it at the default' and '+abicalls' means 'set it to
true'. In this case, (and the similar -modd-spreg case) I'd like the code to be

  IsABICalls = (Bits & Mips::FeatureABICalls) != 0;

or possibly:

   if ((Bits & Mips::FeatureABICalls) != 0)
     IsABICalls = true;
   else
     IsABICalls = false;

and preferably arrange for 'Bits & Mips::FeatureABICalls' to be true by default
(on some triples).




git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223011 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r215640:

[mips] Improve robustness of some tests.

Summary:
This is done by removing some hardcoded registers like $at or expecting a single digit register to be selected.

Contains work done by Matheus Almeida.

Reviewers: matheusalmeida, dsanders

Reviewed By: dsanders

Subscribers: tomatabacu

Differential Revision: http://reviews.llvm.org/D4227



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223012 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r217434:

[mips] Don't cache IsO32 and IsFP64 in MipsTargetLowering::MipsCC

Summary:
Use a MipsSubtarget reference instead.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5008




git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223013 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r217436:

[mips] Move MipsTargetLowering::MipsCC::regSize() to MipsSubtarget::getGPRSizeInBytes()

Summary:
The GPR size is more a property of the subtarget than that of the ABI so move
this information to the MipsSubtarget.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5009




git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223014 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r217485:

[mips] Return an ArrayRef from MipsCC::intArgRegs() and remove MipsCC::numIntArgRegs()

Summary: No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5265




git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223015 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r217494:

[mips] Remove inverted predicates from MipsSubtarget that were only used by MipsCallingConv.td

Summary: No functional change

Reviewers: echristo, vmedic

Reviewed By: echristo, vmedic

Subscribers: echristo, llvm-commits

Differential Revision: http://reviews.llvm.org/D5266



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223016 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r218036:

[mips] Remove custom versions of CCState::AnalyzeReturn() and CCState::AnalyzeCallReturn().

Summary:
The N32/N64 ABI's return f128 values in $f0 and $f2 for hard-float and $v0 and
$a0 for soft-float. The registers used in the soft-float case differ from the
usual $v0, and $v1 specified for return values.

Both cases were previously handled by duplicating the CCState::AnalyzeReturn()
and CCState::AnalyzeCallReturn() functions and modifying them to delegate to
a different assignment function for f128 and further replace the register type
for the hard-float case. There is a simpler way to do both of these.

We now use the common functions and select an initial assignment function based
on whether the original type is f128 or not. We then handle the hard-float case
using CCBitConvertToType<>.

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5269



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223017 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r218451:

[mips] Add CCValAssign::[ASZ]ExtUpper and CCPromoteToUpperBitsInType and handle struct's correctly on big-endian N32/N64 return values.

Summary:
The N32/N64 ABI's require that structs passed in registers are laid out
such that spilling the register with 'sd' places the struct at the lowest
address. For little endian this is trivial but for big-endian it requires
that structs are shifted into the upper bits of the register.

We also require that structs passed in registers have the 'inreg'
attribute for big-endian N32/N64 to work correctly. This is because the
tablegen-erated calling convention implementation only has access to the
lowered form of struct arguments (one or more integers of up to 64-bits
each) and is unable to determine the original type.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5286




git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223018 91177308-0d34-0410-b5e6-96231b3b80d8
Merged from r218509:

[mips] Generalize the handling of f128 return values to support f128 arguments.

Summary:
This will allow us to handle f128 arguments without duplicating code from
CCState::AnalyzeFormalArguments() or CCState::AnalyzeCallOperands().

No functional change.

Reviewers: vmedic

Reviewed By: vmedic

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5292



git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_35@223019 91177308-0d34-0410-b5e6-96231b3b80d8