Merge pull request #1075 from phire/jitil-fastmem

Fix Fastmem in JitIL for massive speed gains.
Make ConvertSingleToDouble generate correct code when !src_is_gpr.

Jit64 didn't use that code path, but JitIL does.

Added a comment to document the issue with the codegen.
Will hopefully reduce cases of this in the future.
JITIL: Improve address calulation for float loads/stores.

For floating loads with a known address, this eliminates the pattern of:

   mov r12d, 80001014
   mov rdx, r12d
   mov rdx, dword ptr [rbp+rdx]

and generates a nice simple:

   mov rdx, dword ptr [rbp+80001014]