[ARM] exynos: Minor sanity check in exynos4_mct_tick_isr()

There is some issue with latest QEMU due to which we get MCT L0 timer
interrupts on CPU1 instead of CPU0 despite explicitly setting irq affinity.

May be this is due to missing GIC combiner code for Exynos SOCs but
for now minor/harmless fix added by this patch fixes the Xvisor crash
on Exynos4 emulated by QEMU.

Signed-off-by: Anup Patel <anup@brainfault.org>