configs: Add ALIGN tag to pci_devices array

Currently not required, but better add this tag to avoid alignments on
future changes to the configurations.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
core/configs: Change IRQ line access control modeling

Change the configuration file to manage access to IRQ lines at IRQ chip
level. Each IRQ chip config entry consists of a unique identifier,
typically the chip's MMIO address, and a bitmap controlling access to
individual IRQs lines of that chip. This will simplify access control
checks to IRQ chips.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Add support for Mod 1 to MMIO parser

The only difference to Mod 2 is the length of the displacement: 1
instead of 4 bytes.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
x86: Add support for IOAPIC access control

This adds basic access control to the IOAPIC. Based on the IRQ chip
configuration, we permit or deny writing to redirection table entries.
This needs to be integrated with interrupt remapping later on.

We furthermore allow reads from other valid IOAPIC registers but deny
any other write accesses.

EOI writing is currently passed through. This will have to be
virtualized as well when interrupt remapping is added.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
configs: Make use of IOAPIC moderation

Remove the IOAPIC page from the memory regions and add the IOAPIC as
irqchip instead.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>