This impelementation was done on a
 The XSV-300 FPGA prototyping board from Xess Cor
poration was used for testing the hardware
DWT core. The XSV-300 contains a 240-pin X
ilinx XCV300 Virtex FPGA that is a 300,000 gate-
equivalent FPGA using lookup tables. The XSV-
300 contains two independe
nt banks of 512k x 16
SRAM for a total of 2 MB to be interfaced dire
ctly with the FPGA. The VHDL DWT core is
synthesized to a Xilinx FPGA usin
g the Xilinx ISE 4.2 software