FogBugz #179710: Ensure interconnect run below 400MHz

To increase the main clock divider from default divide by 4
to divide by 5. By increasing the divider, we will slow down
the main clock which supplied to interconnect. The interconnect
should run below 400MHz. Currently, it is now running slightly
above 400MHz when we speed up the MPU clock to 925MHz for
Cylone V development kit.

Signed-off-by: Chin Liang See <clsee@altera.com>
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Changes for v2
- Enhanced the commit message
FogBugz #180961: Using calloc instead of malloc

To fix the st_micro driver to use calloc instead malloc.
This fix will avoid the incident that uninitiated members of
flash structure are later used for NULL compilation.

Signed-off-by: Chin Liang See <clsee@altera.com>
FogBugz #169625: Enhance Preloader programming FPGA from SDMMC

Enhance the Preloader to have the capability of programming FPGA
from SD card's FAT partition. User just need to put the RBF file
into FAT partition. This is an additional feature on top of
existing Preloader programming FPGA from QSPI flash.

Signed-off-by: Chin Liang See <clsee@altera.com>
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Changes for v3
- Used puts for prinout without argument
Changes for v2
- Removed debug printf