clk: fractional-divider: cast parent_rate to u64 before multiplying

On 32bit architectures, like ARM calculating the fractional rate will
do the multiplication before converting the value to u64 when it gets
assigned to ret, which can produce overflows.

The error in question happened with a parent_rate of 386MHz, m = 3000,
n = 60000, which resulted in a wrong rate value of 15812Hz.

Therefore cast parent_rate to u64 to make sure the multiplication
happens in a 64bit space and produces the correct 192MHz in the example.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
regulator: rk808: Remove pdata from the regulator

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Merge branch 'devel/upstream' into devel/fromlist

Conflicts:
	drivers/regulator/rk808-regulator.c
Merge branch 'devel/fromlist' into devel/workbench

Conflicts:
	drivers/regulator/rk808-regulator.c
net: ethernet: arc: Don't free Rockchip resources before disconnect from phy

Free resources before being disconnected from phy and calling core driver is
wrong and should not happen. It avoids a delay of 4-5s caused by the timeout of
phy_disconnect().

Signed-off-by: Romain Perier <romain.perier@gmail.com>
Merge branch 'devel/upstream' into devel/fromlist
Merge branch 'devel/fromlist' into devel/workbench
saradc: use GENMASK
regulator: add syr82x driver

Silergy SYR827/SYR828 are 2.4MHz synchronous step down DC/DC regulators,
capable of delivering up to 6A output currents.
The output voltage can be programmed from 0.7125V to 1.5V through an
I2C interface.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
add Netxeon R89 dts