CM3: AM437x: Add XTAL calculation code and support am437x

The AM437x CONFIG_STATUS register has two places where
the master xtal frequency can be indicated, and a bit showing
where software should read the value from.  Make a function
that works for both instead of open coding it in i2c.c. This
function works for both because the bit that indicates where
to read the value from is always 0 on am335x.

This was causing issues with a miscalculation of i2c fclk
frequency on AM437x.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
CM3: I2C: Fix PER CLKOUTM2 frequency calculation

Based on experimental readings of the output I2C frequency,
the method used to calculate the PER CLKOUTM2 frequency
while the PER LL is in bypass was found to be incorrect. The
TRM for both AM437x and AM335x indicate that a divisor is
applied. This was found to not be the case.

Having this divisor in the code bottoms out the SCLL and SCLH
registers and causes the I2C controller to run at the highest
possible frequency possible given the input clock. This turns
out to be ~500kHz, which isn't a problem on most platforms.
However, with the AM437x ePOS EVM, the bus is not stable at
this frequency.

Removing the assumption that this divisor is applied corrects
the calculations of the SCLL and SCLH registers leading to a
correct output frequency.

Tested on AM335x (BBB) and AM437x (ePOS EVM)

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
CM3: I2C: Fix duty cycle calculations

The duty cycle calculations were incorrect leading to a 35%
duty cycle. Rework the calculations to get a 50% duty cycle.

Tested on AM335x (BBB) and AM437x (ePOS EVM)

Signed-off-by: Russ Dill <Russ.Dill@ti.com>
CM3: Bump firmware release version to 0x186

This includes fixes in I2C clock rate calculation for both
AM335x and AM437x. On all platforms, incorrect
calculations led to a frequency of around 520kHz
being used. The duty cycle is also corrected from 35%
to 50%.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>