Arc: More fixes for 32bit breakpoints

Previous commit was not that good, as it didn't added some required
things.

First is that after writing breakpoint instruction OpenOCD verifies that
instruction has been written. For this to work properly instruction
should be converted from middle endian.

Second is that when ARC OpenOCD unset breakpoints it checks if the code
hasn't been modified and doesn't removes breakpoint if there is already
some another instruction. To work properly this function should convert
instruction from middle endian.

Third is that when target has halted for yet un

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>
Arc: Improve recognition of halt reason examination

Old core to identify if core halted due to software breakpoint was
working only for 16-bit BRK_S. Instead of adding there a logic for
32-but BRK it is much better to read DEBUG.BH bit which is present in
all ARC cores and is set after the execution of any of BRK instructions.

Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com>