aarch64: create initial page tables

create the initial page tables for TTBR0 / TTBR1
and set up the registers for the MMU.

Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com>
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
MMU: add flush_tlb_local and flush_tlb_all

add the APIs to flush a single processor tlb or all
tlbs in the cluster.

Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com>
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
mmu: implement mmu for aarch64 with refactoring of x64

Signed-off-by: Jani Kokkonen <jani.kokkonen@huawei.com>
Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: remove most AARCH64_PORT_STUB related to MMU

also enable core/pagecache.cc in the AArch64 build.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>