Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212903 138bc75d-0d04-0410-961f-82ee72b054a4
	gcc/
	* graphite-isl-ast-to-gimple.c:
	Add inclusion of gimple-ssa.h, tree-into-ssa.h.
	(ivs_params_clear):
	(build_iv_mapping): New function.
	(translate_isl_ast_node_user): Likewise.
	(translate_isl_ast): Add calling of translate_isl_ast_node_user.

	gcc/testsuite/gcc.dg/graphite/
	* isl-ast-gen-single-loop-1.c: New testcase.
	* isl-ast-gen-single-loop-2.c: New testcase.
	* isl-ast-gen-single-loop-3.c: New testcase.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212904 138bc75d-0d04-0410-961f-82ee72b054a4
	* g++.dg/ipa/imm-devirt-2.C (dg-final): Improve einline dump string.
	* gcc.dg/pr44024.c (dg-options): Add -O1.
	(dg-final): Check for the condition.
	* gcc.dg/vect/pr61680.c (dg-final): Cleanup vect tree dump.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212905 138bc75d-0d04-0410-961f-82ee72b054a4
	* gcc.target/i386/fuse-caller-save-xmm.c (dg-options): Use
	-msse2 -mno-avx instead of -msse.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212909 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64] Implement vbsl_f64 arm_neon.h intrinsic.

[gcc/]
	* config/aarch64/arm_neon.h (vbsl_f64): New intrinsic.

[testsuite/]
	* gcc.target/aarch64/simd/vbsl_f64_1.c: New test.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212910 138bc75d-0d04-0410-961f-82ee72b054a4
gcc/testsuite

        PR tree-optimization/61822
        * gcc.dg/vect/cond-reduc-1.c: Add missed dg directive.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212911 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64][1/2] Remove UNSPEC_CLS and use clrsb RTL code in its' place.

	* config/aarch64/aarch64.md: Delete UNSPEC_CLS.
	(clrsb<mode>2): Use clrsb RTL code instead of UNSPEC_CLS.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212912 138bc75d-0d04-0410-961f-82ee72b054a4
[AArch64][2/2] Add rtx cost function handling of clz, clrsb, rbit.

	* config/aarch64/aarch64.c (aarch64_rtx_costs): Handle CLRSB, CLZ.
	(case UNSPEC): Handle UNSPEC_RBIT.


git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212913 138bc75d-0d04-0410-961f-82ee72b054a4
Fix vext[us]64_1.c test on ARM by unsharing test body.

	* gcc.target/arm/simd/vexts64_1.c: Remove #include, inline test body.
	* gcc.target/arm/simd/vextu64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_u64_1.c: Likewise.
	* gcc.target/aarch64/simd/ext_s64.x: Remove.
	* gcc.target/aarch64/simd/ext_u64.x: Remove.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212914 138bc75d-0d04-0410-961f-82ee72b054a4
2014-07-22  Martin Jambor  <mjambor@suse.cz>

	PR ipa/61160
	* g++.dg/ipa/pr61160-3.C (main): Return zero.



git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212915 138bc75d-0d04-0410-961f-82ee72b054a4
Daily bump.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@212919 138bc75d-0d04-0410-961f-82ee72b054a4
[Patch, microblaze]: Add optimized lshrsi3

When barrel shifter is not present, the immediate value
is greater than #5 and optimization is -OS, the
compiler will generate shift operation using loop.

Changelog

2013-11-26  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/config/microblaze/microblaze.md: Add size optimized lshrsi3 insn

ChangeLog/testsuite

2014-02-12  David Holsgrove <david.holsgrove@xilinx.com>

 * gcc/testsuite/gcc.target/microblaze/others/lshrsi_Os_1.c: New test.

Signed-off-by:Nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add INIT_PRIORITY support

Added TARGET_ASM_CONSTRUCTOR and TARGET_ASM_DESTRUCTOR macros.

These macros allows users to control the order of initialization
of objects defined at namespace scope with the init_priority
attribute by specifying a relative priority, a constant integral
expression currently bounded between 101 and 65535 inclusive.

Lower numbers indicate a higher priority.

Changelog

2013-11-26  Nagaraju Mekala <nagaraju.mekala@xilinx.com>

 * gcc/config/microblaze/microblaze.c: Add microblaze_asm_constructor,
   microblaze_asm_destructor. Define TARGET_ASM_CONSTRUCTOR and
   TARGET_ASM_DESTRUCTOR.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Add supervisory call support

A function can be executed in supervisory mode when a function
is declared with svc_handler attribute.

If a function with svc_handler is called, the processor switches
to supervisory mode and executes. After executing the function
it returns to normal mode.

Same feature can also be invoked with svc_table_handler attribute
but this attribute will accept a service ID, to be used for
calling the function.

Signed-off-by:nagaraju <nmekala@xilix.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Increase max alignment to please the testsuite

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Disable fivopts by default

Turn off ivopts by default. Interferes with cse.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>

 * gcc/common/config/microblaze/microblaze-common.c
   (microblaze_option_optimization_table): Disable fivopts by default.

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Use bralid for profiler calls

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Enable DWARF exception handling support.

Changelog

2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>
            David Holsgrove <david.holsgrove@xilinx.com>

 * common/config/microblaze/microblaze-common.c: Remove
   TARGET_EXCEPT_UNWIND_INFO definition.
 * config/microblaze/microblaze-protos.h: Add
   microblaze_eh_return prototype.
 * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
   microblaze_expand_epilogue, microblaze_return_addr): Handle
   calls_eh_return
   (microblaze_eh_return): New function.
 * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
   EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
   ASM_PREFERRED_EH_DATA_FORMAT
 * gcc/config/microblaze/microblaze.md: Define eh_return pattern.

Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
[Patch, microblaze]: Fixed missing save of r18 in fast_interrupt.

Register 18 is used as a clobber register, and must be stored when
entering a fast_interrupt. Before this fix, register 18 was only
saved if it was used directly in the interrupt function.

However, if the fast_interrupt function called a function that used
r18, the register would not be saved, and thus be mangled
upon returning from the interrupt.

Changelog

2014-02-27  Klaus Petersen <klauspetersen@gmail.com>

 * gcc/config/microblaze/microblaze.c: Check for fast_interrupt in
   microblaze_must_save_register.

Signed-off-by: Klaus Petersen <klauspetersen@gmail.com>
Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
[Patch, microblaze]: Removed moddi3 routinue

Using the default moddi3 function as the existing implementation has many bugs

Signed-off-by:Nagaraju <nmekala@xilix.com>