llvmpipe: fix blending with half-float formats

The fact that we flush denorms to zero breaks our half-float
conversion and blending. This patches enables denorms for
blending. It's a little tricky due to the llvm bug that makes
it incorrectly reorder the mxcsr intrinsics:
http://llvm.org/bugs/show_bug.cgi?id=6393

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
draw: fix vbuf caching of vertices with inject front face

Caching in the vbuf module meant that once a vertex has been
emitted it was cached, but it's possible for a vertex at the
same location to be emitted again, but this time with a different
front-face semantic. Caching was causing the first version of the
vertex to be emitted, which resulted in the renderer getting
incorrect front-face attributes. By reseting the vertex_id (which
is used for caching) we make sure that once a front-face info
has been injected the vertex will endup getting emitted.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
llvmpipe: add a very useful (disabled) debugging output

Disabled by default, but it's very useful when needed.

Signed-off-by: Zack Rusin <zackr@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
Reviewed-by: Roland Scheidegger <sroland@vmware.com>
r600g/sb: fix stack size computation on evergreen

On evergreen we have to reserve 1 stack element in some additional cases
besides the ones mentioned in the docs, but stack size computation was
recently reimplemented exactly as described in the docs by the patch that
added workarounds for stack issues on EG/CM, resulting in regressions
with some apps (Serious Sam 3).

This patch fixes it by restoring previous behavior.

Fixes https://bugs.freedesktop.org/show_bug.cgi?id=72369

Signed-off-by: Vadim Girlin <vadimgirlin@gmail.com>
Cc: "10.0" <mesa-stable@lists.freedesktop.org>
Tested-by: Andre Heider <a.heider@gmail.com>
llvmpipe: add plumbing for ARB_depth_clamp

With this patch llvmpipe will adhere to the ARB_depth_clamp enabled state when
clamping the fragment's zw value. To support this, the variant key now includes
the depth_clamp state. key->depth_clamp is derived from pipe_rasterizer_state's
(depth_clip == 0), thus depth clamp is only enabled when depth clip is disabled.

Reviewed-by: Roland Scheidegger <sroland@vmware.com>
Reviewed-by: José Fonseca <jfonseca@vmware.com>
glx: Add missing null check in DRI2WireToEvent

Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
svga: expose HW smooth/stipple/wide lines

Newer virtual HW versions support smooth/stipple/wide lines.
Use that instead of 'draw' fallbacks when possible.

Reviewed-by: José Fonseca <jfonseca@vmware.com>
mesa: fix a typo in glDetachShader error message

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
glsl: introduce data section to ir_variable

Data section helps serialization and cloning of a ir_variable. This
patch includes the helper bits used for read only ir_variables.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
glsl: move variables in to ir_variable::data, part I

This patch moves following bitfields in to the data structure:

used, assigned, how_declared, mode, interpolation,
origin_upper_left, pixel_center_integer

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
glsl: move variables in to ir_variable::data, part II

This patch moves following bitfields and variables to the data
structure:

explicit_location, explicit_index, explicit_binding, has_initializer,
is_unmatched_generic_inout, location_frac, from_named_ifc_block_nonarray,
from_named_ifc_block_array, depth_layout, location, index, binding,
max_array_access, atomic

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
glsl: modify ir_clone to use memcpy

Patch copies the whole data structure at once instead of
assigning individual variables.

Signed-off-by: Tapani Pälli <tapani.palli@intel.com>
Reviewed-by: Paul Berry <stereotype441@gmail.com>
winsys/radeon: set/get the scanout flag with the tiling ioctls

If we assume that all buffers allocated by the DDX are scanout, a new flag
that says "this is not scanout" has to be added to support the non-scanout
buffers and maintain backward compatibility.

This fixes bad rendering on Wayland.

The flag is defined as:
  #define RADEON_TILING_R600_NO_SCANOUT   RADEON_TILING_SWAP_16BIT

AFAIK, RADEON_TILING_SWAP_16BIT is not used on SI.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeon: move some functions to r600_buffer_common.c

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Christoph Brill <egore911@gmail.com>

v2: Renamed r600_buffer.c to r600_buffer_common.c. The stupid build system
    doesn't allow 2 files of the same name in different directories.
r600g: use common interfaces in buffer_transfer_unmap

i.e. dma_copy and resource_copy_region.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: implement accelerated buffer copying

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
radeonsi: handle PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE

which can come from glBufferData and glMapBufferRange.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
r600g,radeonsi: share flags has_cp_dma and has_streamout

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
r600g: refactor out code for buffer invalidation

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
r600g,radeonsi: consolidate some debug flags

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>