ARM: tegra: support large RAM sizes

Some systems have so much RAM that the end of RAM is beyond 4GB. An
example would be a Tegra124 system (where RAM starts at 2GB physical)
that has more than 2GB of RAM.

In this case, we want gd->ram_size to represent the actual RAM size, so
that the actual RAM size is passed to the OS. This is useful if the OS
implements LPAE, and can actually use the "extra" RAM.

However, we can't use get_ram_size() to verify the actual amount of RAM
present on such systems, since some of the RAM can't be accesses, which
confuses that function. Avoid calling get_ram_size() when the RAM size
is too large for it to work correctly. It's never actually needed anyway,
since there's no reason for the BCT to report the wrong RAM size.

In systems with >=4GB RAM, we still need to clip the reported RAM size
since U-Boot uses a 32-bit variable to represent the RAM size in bytes.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
LOCAL: enable ext4 write for DFU testing

Signed-off-by: Stephen Warren <swarren@nvidia.com>
LOCAL: test: dfu: reduce max test binary size

Tegra's DFU buffer is smaller than 8M. Remove that test case since we
know it will fail.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
ARM: tegra: import latest Jetson TK1 pinmux

syseng has revamped the Jetson TK1 pinmux spreadsheet, basing the content
completely on correct configuration for the board/schematic, rather than
the previous version which was based on the bare minimum changes relative
to another reference board.

NOTE: THIS COMMIT IMPORTS A PRELIMINARY VERSION OF THE SPREADSHEET; IT
SHOULD NOT BE RELIED UPON OR UPSTREAMED UNTIL THE FINAL SPREADSHEET IS
AVAILABLE.

The new spreadsheet sets TRISTATE for any input-only pins. This only works
correctly if the global CLAMP bit is not set, so don't set it. Apparently
syseng have changed their mind since the previous advice that this needed
to be set:-/ In theory, we should adjust the Venice2 port to also not set
CLAMP, but I don't have time to validate that change at present.

Signed-off-by: Stephen Warren <swarren@nvidia.com>