Generic secure time layer

Provided a time source api in order to let soc vendors implement their
own secure counter

- Moved platform-dependent code out of tee_time.c to make it a generic
  time layer.
- Added an abstract layer for platforms to implement their own secure
  time source.
- Implemented arm cntpct as one of secure time source.
- Moved rtt0 related time operation from tee_time.c to tee_time_rtt.c,
  act as another secure time source.
- Added tee_time_ree.c for the plaform that doesn't have secure time
  source. In this case, using ree time as secure time source.
Implemented wait in normal world

Instead of busy waiting in secure world, it is more efficient to wait
in normal world such that HLOS can schedule another task to execute
while waiting

- Added a new RPC command to wait in linux driver
- Remove wait_specific() hook in time_source, it seems can be a generic
  function.
- This patch depends on "Implemented wait in normal world" in
  optee_linuxdrver
"Core Status" service on malloc

- Gets teecore heap info.
- Enabled only on CFG_TEE_FW_DEBUG != 0.
- Update dirty tests
- Reset max allocated size after malloc dirty tests.
vexpress,qemu: Change memory layout

Start QEMU with -m 1057
Use vexpress-v2p-ca15-tc1.dtb from the Linux kernel tree
plat-vexpress: fix non-debug build

Fixes a number of build errors when 'PLATFORM=vexpress' and 'DEBUG=':
- '<var> may be used uninitialized'
- 'dereferencing type-punned pointer will break strict-aliasing rules'
This one is addressed by adding -fno-strict-aliasing to the cflags for the
problematic files, which is a temporary solution.
- 'inlining failed'

Also, make sure tee_svc_syscall_table is aligned on a 32-bit boundary.
Otherwise, an alignment fault might occur:
  ERR [0x0] TEE-CORE:tee_pager_print_error_abort:101: data-abort at 0x602f16b
  FSR 0x1 PC 0x6007bd4 TTBR0 0x603804A CONTEXIDR 0x1
  CPUID 0x80000001 DBGPCSR 0x0 CPSR 0x80000013 (read from SPSR)
  ERR [0x0] TEE-CORE:tee_pager_handle_abort:164: [TEE_PAGER] alignement fault!  (trap CPU)

Note: on Foundation_v8, I measured a ~3x speedup between debug and non-debug
builds for asymmetric crypto tests.