Cortex-A5 IAR port baseline prior to removing all SAMA5 specifics to make it generic.:
- Slight improvement to the save context macro.
- Remove some #warning remarks.
- Enable interrupts before calling the ISR handler rather than in the ISR handler.

git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2284 1d2547de-c912-0410-9cb9-b8ca96c0e9e2
Cortex-A5 IAR port:
- Removed SAMA5 specifics from the port layer, and instead call a generic ISR callback as per Cortex-A9 ports.

git-svn-id: http://svn.code.sf.net/p/freertos/code/trunk@2285 1d2547de-c912-0410-9cb9-b8ca96c0e9e2