[TASK] Revise Altera Qsys subsystems

- Add flash bridges to subsystems.
- Add EPCS flash in toplevel Qsys connected to flash bridge.
- Solve warnings by exporting openMAC timer outport.
- Increase slow bridge address width to 19.

Change-Id: I25470acf5f1f5e9cc23ac90bd115f54bec84bbf6
[TASK] Revise EPCS Flash programming

- Add program-epcs.sh script that can program an EPCS flash without
  connecting to Nios II instance (no need to erase flash before).
- Add EPCS support to driver application scripts.
- Add chain and converter setting files to TERASIC DE2-115 board.

Change-Id: Ia03a2dcd211c150cdb429b8e3dca42377cfdacec
[FEATURE] Add Quartus and Qsys project for Antares Interface

- Add MN pcp subsystem
- Add 256kx16 SRAM (tri-state-bridge)
- Add openMAC for single phy
- Add EPCS ipcore for M25P16 flash
- Add PCIe
- Add 125 MHz PLL output
- Add DPRAM for common memory
- Add pipeline bridge
- Connect PCIe with SRAM via pipeline bridge
- Separate reset interconnect for PCIe and Nios II / peripherals

Change-Id: I693fab99bd3628d3f1dfef111f40259f1e73b617
[FEATURE] Add signal tap for pcp and host benchmarks

- Add 1 MHz clock for acquisition
- Add signal tap instance

Change-Id: Id25cf03286392d4dff64bd0dd08d25fcfc2cb28f