msm: mdss: fix clearing interrupts of DSI0 during isr for DSI1

Currently we need to handle DSI-1 interrupts only for panel/DCS
commands in the software during broadcast mode. When we handle
isr for DSI-1 interrupt, we clear all the interrupts for DSI-0
also. This might cause timeout issues for waits on DSI-0
interrupts like CMD_MDP_DONE since the interrupt is cleared
and we do not handle the interrupt for DSI-0. Fix this issue
by clearing only the DMA_DONE interrupt for DSI-0 during the
isr handling for DSI-1.

Change-Id: Id1735673f94066ff6c7250eaef7d9394b0525c2f
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm: mdss: dsi: remove unused memory mapped resource

There are more than one instances where the DSI registers
are memory mapped in the driver whereas only one instance is
being used. Remove the reference to the unused resource.

Change-Id: Ia213e94b43bf58446eead47b18cadeb36d6795a7
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: Add support for ULPS mode for DSI

For smart panels that can refresh display from their internal
RAMs, it is possible to configure the DSI clock and data lanes
in Ultra Low Power State (ULPS) during idle static screen
usecase. Add support for this feature.

Change-Id: I4e94d6a0201262f0675322efc9e39dd93c86edda
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: Turn off MDP GDSC in idle screen for cmd mode panels

For command mode panels, the DSI lanes can be configured to an
Ultra Low Power State (ULPS) during idle screen use case. In such
cases, it is possible to turn off the MDP GDSC as MDP is completely
idle. This would result in reducing any leakage current. Add
support for this feature.

Change-Id: Ic4074f9e12a27fe0fbe95219ffaa2f466abee307
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: add a separate register region for DSI PHY

The DSI PHY register offset from the controller base is
different for different targets. So, add a separate register
region for DSI PHY in the device tree. This register base and
offset will be used to access the DSI PHY registers. Also
change the register offsets which are dependent on the
controller base address.

Change-Id: Ie1d08950f3c8c8801908a1b3cf7db46a44b4e8c3
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msm: mdss: Cleanup handling of dual dsi broadcast mode

When broadcast mode is enabled for dual dsi panels, the two dsi
controllers act in a master-slave configuration. A lot of configuration
in the driver requires special handling in such scenarios. Current
implementation has a lot of redundant code to check for broadcast mode
configurations. Rework the code to remove these and add a unified set of
APIs to query broadcast mode configurations.

Change-Id: I634f94266e8dce28bcaa897ef39e7c3ca9b558e5
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: cleanup dsi clock handling

Currently the DSI driver uses a two level reference counting for
the clocks used by the driver so as to ensure that the clocks are
correctly configured for dual-dsi use cases. However, this is not
necessary as the same can be achieved by using a single reference
count. Clean up the code to remove the sub-level ref counts and
add necessary error handling.

Change-Id: I6f1c1bfe83322dc0e1da3d757b6ca88cd629663e
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: Add support to selectively control bus and link clocks

DSI driver needs two different types of clocks for normal
operation - bus clocks and link clocks. The clock control function
enables/disables both these set of clocks together. However,
under certain circumstances, it is required to control just the
link clocks or the bus clocks. To support this, add separate
ref counts for link and bus clocks and modify the clock control
function to selectively control these clocks.

Change-Id: I25312131fc737b56dc15f4edf5e55a5824dad855
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: Turn on DSI link clocks after exiting ULPS

DSI branch clocks should only be enabled after removing the DSI clamps
when exiting the Ultra Low Power State (ULPS). If this is not enforced,
then the RCG for these clocks may not get turned on correctly which
may eventually lead to some display corruption. Fix this by
appropriately modifying ULPS exit sequence.

Change-Id: I5109dd140f8921256f95eb479dd33a73615d489f
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
msm: mdss: dsi: check ULPS state only for active lanes

It is possible that for certain panels, not all four data lanes are
active. After configuring the lanes to Ultra Low Power State (ULPS),
only check the status of the active lanes since the lanes that are not
used will never enter ULPS.

Change-Id: I0da358f2bd24d4472cfccb6cca9ca8b26ffa8226
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>