OMAP4: EMIF: Disable EMIF DDR self refresh during EMIF frequency change sequences

Errata ID: i728

Description:

If during a small window the following three events occur simultaneously:

1) The EMIF_PWR_MGMT_CTRL[7:4] REG_SR_TIM SR_TIMING counter expires
2) Frequency change update is requested CM_SHADOW_FREQ_CONFIG1
   FREQ_UPDATE set to 1
3) OCP access is requested

There will be clock instability on the DDR interface.

Workaround:

Prevent event 1) while event 2) is happening: Disable the self-refresh when
self-refresh is enabled and a frequency change sequence is requested.

Change-Id: I6c216d18f2747dae8a9160669533f0f1582d3301
Signed-off-by: Jacky Cheung <jacky.cheung@ti.com>