NUCLEO_F401RE: Change system clock to 84 MHz using HSI + PLL

Update also HSE_VALUE and SPI prescaler value.
Update after hex enabled firmware release

Removed SystemInit write to FWID.
Added DEVICE_ERROR_PATTERN for error signaling.
Exception for NRF added to board.c to keep irqs enabled since timer irq
is needed for the wait function.
Button pin names changed from BUTTON0 to BUTTON1 and from BUTTON1 to
BUTTON2.
board.c conflict resolved
Added missing #endif
merge with mbedmicro
Conflicts resolved. gpio_init_in will call gpio_mode after gpio_dir
Fixed syntactic bug in board.c
Merge branch 'master' of https://github.com/mbedmicro/mbed

Conflicts:
	libraries/mbed/targets/cmsis/TARGET_STM/TARGET_NUCLEO_F401RE/stm32f4xx_hal_conf.h
	libraries/mbed/targets/hal/TARGET_STM/TARGET_NUCLEO_F401RE/spi_api.c
Merge branch 'master' of https://github.com/mbedmicro/mbed
[NUCLEO_F302R8] Add cmsis files (first part)
[NUCLEO_F302R8] Add cmsis files (2nd part)
[NUCLEO_F302R8] Add cmsis files (last part)
[NUCLEO_F302R8] Add hal files
[ARM][uVision4][LPC11U35]: Modified export_test.py error
[NUCLEO_F401RE] Restart PLL after deepsleep
[NUCLEO_F401RE] Add more SERIAL and PWM pins
[NUCLEO_F401RE] Add more ANALOG_IN, I2C and SPI pins
[NUCLEO_F401RE] Add INTERRUPT_IN to all pins
[NUCLEO_F401RE] Put back SERIAL_TX and SERIAL_RX pins

Even if it is a duplication of USB_TX/RX pins, it is better to have them
available.
[NUCLEO_F401RE] Typo corrections