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SAMA5 PCK: Add Main clock as an option for the PCK clock source
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SAMA5 WM8904:  Add option to use MAINCK as WM8904 MCLK
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WM8904:  Various updates to get BCLK/LRCLK correct.  Acutally worse the parent, but I think is on the right track
WM8904:  Add logic to analyze BCLK setup
WM8904:  Tried disabling the SYSCLK while updating the FLL.  Didn't help but is still probably a correct change
WM8904: Restore mystery bit in setup that was accidentally tossed before
WM8904 interface enable method now returns the previous interrupt state
Correct the WM8904 interrupt configuration, active high level. Fix that and don't pull-up
WM8904 interface enable method now returns the previous interrupt state.  Correct ordering of some WM8904: Need to provide MCLK before initializing the WM8904, not after
WM8904: Correct calculation of bitrate (I am not sure why this is correct). LR clock divisor is now a constant 32-bits per frame. Conditioned out interrupt logic; it is not being used. Also added some FLL lock interrupt/poll logic (which was subsequently disabled).
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WM8904: Update READMEs and defconfigs to last tested configuration
SAMA5: Some usage documents for media players
WM8904: Add reset logic to put the part back in its initial state after playing each WAV file.  Base samles per second on frame length, not bits-per-sample.  Use a different frame length for 8-bit and 16-bit data
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SAMA5D3 HSMCI: TX DMA is again disabled
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