ilo: create u_upload_mgr last

Similar to u_blitter, u_upload_mgr is now a client of the pipe context.  Its
creation needs to be delayed until the context has been (almost) initialized.
i965/vec4: Add a brw->gen >= 6 assertion in three-source emitters.

Three source instructions didn't exist until Gen6.  vec4_generator has
assertions to catch this, but catching it in the visitor provides a
nicer backtrace.

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
i965/vec4: Handle ir_triop_lrp on Gen4-5 as well.

When the vec4 backend encountered an ir_triop_lrp, it always emitted an
actual LRP instruction, which only exists on Gen6+.  Gen4-5 used
lower_instructions() to decompose ir_triop_lrp at the IR level.

Since commit 8d37e9915a3b21 ("glsl: Optimize open-coded lrp into lrp."),
we've had an bug where lower_instructions translates ir_triop_lrp into
arithmetic, but opt_algebraic reassembles it back into a lrp.

To avoid this ordering concern, just handle ir_triop_lrp in the backend.
The FS backend already does this, so we may as well do likewise.

v2: Add a comment reminding us that we could emit better assembly if we
    implemented the infrastructure necessary to support using MAC.
    (Assembly code provided by Eric Anholt).

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75253
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
i965: Stop lowering ir_triop_lrp.

Both the vector and scalar backends now support it natively, so there's
no point in lowering it.

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
glsl: Delete LRP_TO_ARITH lowering pass flag.

Tt's kind of a trap---calling do_common_optimization() after
lower_instructions() may cause opt_algebraic() to reintroduce
ir_triop_lrp expressions that were lowered, effectively defeating the
point.  Because of this, nobody uses it.

v2: Delete more code (caught by Ian Romanick).

Cc: "10.1" <mesa-stable@lists.freedesktop.org>
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
Acked-by: Eric Anholt <eric@anholt.net>
i965: Don't forget to subtract mt->first_level in minify calls.

This fixes fbo-clear-formats GL_ARB_depth_texture on Ironlake, which
regressed since commit f128bcc7c293013f4b44e4b661638333de0077c2
("i965: Drop mt->levels[].width/height.")  intel_miptree_copy_slice was
calling minify(.., 7) on a 2x2 texture with mt->first_level == 7.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=75292
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
i965: Don't try to dump shader source for fixed-function FS programs.

sh->Source is NULL and this will segfault.

Fixes MESA_GLSL=dump with "The Swapper".

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Eric Anholt <eric@anholt.net>
meta: Use a #define for the vector type to avoid %svec4 everywhere.

By adding "#define gvec4 %svec4" to the top of our fragment shader, we
can write generic code without needing to specialize it to vec4, ivec4,
or uvec4 via asprintf.

This also makes the INT and UNSIGNED_INT merge function code identical,
so I combined those two cases.

It's not a big savings, but a little bit tidier.

v2: Rebase on Vinson's MSVC build fixes.

Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Reviewed-by: Matt Turner <mattst88@gmail.com>
glsl: add switch case for MESA_SHADER_COMPUTE

To fix warning about unhandled enum value.

Reviewed-by: Anuj Phogat <anuj.phogat@gmail.com>
i965: Fix the region's pitch condition to use blitter

intelEmitCopyBlit uses a signed 16-bit integer to represent
buffer pitch, so it can only handle buffer pitches < 32k.

Cc: mesa-stable@lists.freedesktop.org
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
radeonsi: Prevent geometry shader from emitting too many vertices