tcg-aarch64: Properly detect SIGSEGV writes

Since the kernel doesn't pass any info on the reason for the fault,
disassemble the instruction to detect a store.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use intptr_t apropriately

As opposed to tcg_target_long.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use TCGType and TCGMemOp constants

Rather than raw constants that could mean anything.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use MOVN in tcg_out_movi

When profitable, initialize the register with MOVN instead of MOVZ,
before setting the remaining lanes with MOVK.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use ORRI in tcg_out_movi

The subset of logical immediates that we support is quite quick to test,
and such constants are quite common to want to load.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Special case small constants in tcg_out_movi

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use adrp in tcg_out_movi

Loading an qemu pointer as an immediate happens often.  E.g.

- exit_tb $0x7fa8140013
+ exit_tb $0x7f81ee0013
...
- :  d2800260        mov     x0, #0x13
- :  f2b50280        movk    x0, #0xa814, lsl #16
- :  f2c00fe0        movk    x0, #0x7f, lsl #32
+ :  90ff1000        adrp    x0, 0x7f81ee0000
+ :  91004c00        add     x0, x0, #0x13

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use symbolic names for branches

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Create tcg_out_brcond

Rearrange code to put the compare and branch in the same place.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use CBZ and CBNZ

A compare and branch against zero happens at the start of
every single TB.

Reviewed-by: Claudio Fontana <claudio.fontana@huawei.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Reuse FP and LR in translated code

We don't need the FP within translated code, and the LR is
otherwise unused.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Introduce tcg_out_insn_3314

Combines 4 other inline functions and tidies the prologue.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Rearrange prologue insn order

Loads LR earlier so that it's available for the return branch earlier.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Implement tcg_register_jit

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Avoid add with zero in tlb load

Some guest env are small enough to reach the tlb with only a 12-bit addition.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use tcg_out_call for qemu_ld/st

In some cases, a direct branch will be in range.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use ADR to pass the return address to the ld/st helpers

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Use TCGMemOp in qemu_ld/st

Making the bswap conditional on the memop instead of a
compile-time test instead.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Implement TCG_TARGET_HAS_new_ldst

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-aarch64: Introduce tcg_out_insn_3507

Cleaning up the implementation of REV and REV16 at the same time.

Signed-off-by: Richard Henderson <rth@twiddle.net>