Added description of *with mask* functionality

Added mark to instructions that should support this functionality.
 On branch develop
 Changes to be committed:
   (use "git reset HEAD <file>..." to unstage)

	modified:   doc/isa_spec.md
Added stack instructions
Added flags - need to delete as appropriate
removed unused operation column
Removed un-used and broken testbench
added a very generic multiplexer and simple testbench

Requires visual inspection currently. No automatic assertions at present
 On branch feature/modules
 Changes to be committed:
   (use "git reset HEAD <file>..." to unstage)

	new file:   src/common_types.vhd
	new file:   src/rtl/mux.vhd
	new file:   src/test/mux_tb.vhd
Removed messy generics for multiplexers.

Now create a different multiplexer module depending on the
number of its inputs and outputs. Port widths are still generics.

Need to verify mux_4to1 and mux 2to1

 On branch feature/modules
	modified:   src/common_types.vhd
	renamed:    src/rtl/mux.vhd -> src/rtl/mux_2to1.vhd
	deleted:    src/test/mux_tb.vhd
First commit of testbench generator script

Doesnt currently extract signals from the DUT port list. This
is a feature to be added!
 On branch feature/tbgen
 Changes to be committed:
   (use "git reset HEAD <file>..." to unstage)

	new file:   src/testbench_template.vhd
	new file:   tools/tbgen.py
Can now extract component declaration
Added automatically generated testbenches for unverified modules.
 On branch feature/modules
 Changes to be committed:
   (use "git reset HEAD <file>..." to unstage)

	new file:   src/test/ff_jk_tb.vhd
	new file:   src/test/mux_2to1_tb.vhd
	new file:   src/test/mux_4to1_tb.vhd
Update isa_spec.md

Added halt and debug
Implemented the reg_shift module - needs verifying

resolves #14
 On branch develop
 Changes to be committed:
   (use "git reset HEAD <file>..." to unstage)

	modified:   src/rtl/mux_4to1.vhd
	modified:   src/rtl/reg_shift.vhd
Merge branch 'develop' of github.com:willprice/vhdl-computer into develop
Add Doxygen builder to site_scons
Clean up files

- Remove trailing whitespace.
- Use `rising_edge` instead of `sig'event and sig = '0';` pattern.
- Made TBs produced by tbgen compilable.
Merge pull request #18 from willprice/develop

Develop