Halt the processor if hypervisor main function returns

Instead of wasting power by looping, use WFE instruction to halt the
processor until an exception occurs.
Initial stages of start up, checking for secure mode state.

Secure mode is required to get into HYP mode. If we are booted in
non-secure mode, we will have problems.
Merge branch 'development' into startup

Conflicts:
	arch/arm/head.S
Utilise new pre-processing to use include files in asm

Asm can now use include files to keep source files tidier.
Rename printk.{c,h} to printh.{c,h}

Use better naming conventions. printh stands for print hypervisor.
Also use printh.h in head.S to simplify external symbol definitions.
Merge branch 'build-system' into startup
Check current processor state is in hyp mode

U-Boot places the processor into hyp mode during boot, so no need to get
there manually.
Load HVBAR for handling exceptions taken to hyp mode

Install stub handlers for exceptions taken to hyp mode. Ready
to be fleshed out with resolutions eventually.
Build uImage by default

uImage is the primary boot method, so it makes sense to build it by
default.
Beginning of start up code

Startup requires initiating the GIC and other IRQ related things,
and should be tested by starting the Global Timer.

All exception traps are just debug messages for now, printing the registers
at the time of the exception.
Ignore new intermediate build files
Working GIC interrupts

GIC interrupts now working. GIC in Cubietruck does not contain security
extensions, therefore conditionals are left out.

Tested with GICD_SGIR, however bug introduced of serial output corrupting
after interrupt has been handled
Correct GIC configuration

GICD_ITARGETSRx must only target the current cpu, and traps were corrupting
the stack - cleaned up the way the trap handlers use the SAVE_REGS macro
and made a new RESTORE_REGS macro to simplify clean up after handling trap.
Clean up output

Space output out a little more to make it easier to read
Stop disabling interrupts in exception handler

Exceptions with higher priority must be able to be taken during lower
priority exceptions, therefore disabling interrupts should not occur
during exception traps.
Enable System Timer IRQ

IRQ trap handler deactivates interrupts - only GICv2 can deactivate
on write to End of Interrupt Register, and only when EOImode in CTLR is set.

System timer is running from 24MHz clock for high precision timing.
Interrupt occurs when timer value counts to 64k, making it a 10ms timer
interval ready for VM kernel timings.
Introduce configuration header

Configuration options should be set in config.h instead of defined randomly
throughout sorce code. This confines the configuration options to a single
file.