target-arm: Fix intptr_t vs tcg_target_long

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Tidy call+jump patterns

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Use intptr_t as appropriate

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Don't handle remainder

The generic fallback is exactly what we implemented.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Dont handle constant arguments to ext32 ops

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Improve tcg_out_movi

If bits 31:13 are zero, reduce the insn count by one.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Use TCGMemOp within qemu_ldst routines

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Fix ld64 for 32-bit mode

Since were not using an annulled branch, we need to put a nop
in the delay slot.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Reference address registers explicitly, rather than indicies

It's two argument registers either way.  And use more TCGReg as appropriate.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Fix tlb read

We were computing the full address into %o0 and then not using it.
Adjust some of the computation to rely less on having to pull immediate
values into registers.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: First pass at the ldst optimization

Several inefficiencies exist, but it's just good enough to boot.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Pull half the slow path out to trampolines

Not essential for 32-bit, but significant for 64-bit PIE.

We need the call to the trampoline to load an address against
which we can apply a small displacement, rather than building
a full 64-bit address.

But we do get a small code size decrease for 32-bit as well.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Convert to new ldst opcodes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Remove most uses of TCG_TARGET_REG_BITS

Replace with SPARC64 define.  Soon even sparcv8plus will use
64-bit register as far as TCG is concerned.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg: Fix missed pointer size != TCG_TARGET_REG_BITS changes

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Use 64-bit registers with sparcv8plus

Quite a lot of effort was spent composing and decomposing 64-bit
quantities in registers, when we should just create them and leave
them as one 64-bit register.

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Avoid Y register use for division

Using DIVX instead of DIV is better for sparc64

Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-sparc: Don't handle mulu2_i32

Using the 64-bit MULX is better than UMUL+RDY.

Signed-off-by: Richard Henderson <rth@twiddle.net>