[sam] Eliminate warnings

the usart_enable/usart_disable() methods are for api compatibility with other
parts of libopencm3.
STM32F0: Turn on PLL clock source when asked to

The STM32F05xxx/06xxx manual describes on p.98 (Sec 7.4.1) the RCC_CR
register, on which it says that bit 24 is the PLLON bit which has to be
enabled before using the PLL. This causes the PLL to be enabled with
rcc_osc_on(PLL).
STM32F0: Fix PLL multiplication factor for 48MHz setup

It was set to overclocking configuration!
STM32F0: Fix the PLL multiplier table

The value '6' was twice in the table and all higher frequencies are
shifted. The values are now fitting the table in 'STM32F05xxx/06xxx advanced
ARM-based 32-bit MCUs', page 101.

PLL frequencies have been measured by selecting

    rcc_set_mco(RCC_CFGR_MCO_SYSCLK);

and measuring the output with an oscilloscope. 8, 16, 24, 32, 40 and 48 MHz
work fine from the HSI base.
STM32F0: Correctly clear pll source bits.
[stm32f4] add I2C frequencies

STM32F4 allows I2C frequencies up to 42 MHz, this commit adds the missing
defines.
[build] Remove PyYAML dependency

This converts all the YAML files to JSON files, as json parsing is built
into python instead of being a separate library requiring installation.

YAML is a superset of JSON, but putting comments in is not quite as obvious
as it is in yaml.

The following glue was used to convert yaml to json:
python -c 'import sys, yaml, json; json.dump(yaml.load(sys.stdin), sys.stdout, indent=4)' < $1 > $2

Clearly I haven't tested this on every single platform, and this
doesn't address the large blobs of yaml in the lpc4300 scripts directory,
only the cortex NVIC generation process.

I've tested a few IRQ driven example apps, and I've checked the generated
output of some known cases like the LM3s that has explicit gaps, and they are
all generated correctly.
[CM3] Add core interrupt masking for easy creation of atomic blocks
[CM3] Add support for Cortex M interrupt masks

FIX: add doxygen documentation to the module
[CM3] Add atomic operation support

Tested with -O0, -O2 and -Os generating correct code with gcc-arm-embedded 2013q2.
note -std=c99 or newer needed
[Stylecheck] Correct style in the CM3 addition
[CM3] Add register definitions for Debug Watch Trace point.

Add provision functions for the use of CPU counter as a high-resolution timer for code benchmarking purposes
[CM3:DWT] Add the file to library build process for each target
* unnecessary PG bit clearing removed from flash word and half-word programming to improve speed
* missing PG bit set is inserted at word programming
Add the linker generator makefile

Example of use is included in the file header
Add example to the device database file
Add Readme to linker script generator dir
Add Example makefile to linker script generator dir
[GENLINK] correct the whitespace bug
[GENLINK] Add Test suite + simple test