msm: perf: fix formatting of trace entry

Remove extraneous comma which breaks processing of
the trace data.

Change-Id: I5fda44cde6a39b16be06c72bc968afc19636b32f
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
msm: perf: Fix cpu id logic in tracectr notifier

The code in tracecounter context switch notifier was using
smp_processor_id() in order to get cpu number. This was resulting
into following dmesg error: "BUG: using smp_processor_id() in
preemptible [00000000] code".
Use thread_info struct to get the cpu #.

Change-Id: Ic7c995d2c2bc25c4389248854dec91fb84ce3128
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
msm: perf: tracectr: Initialize cnts after hotplug

Due to the mismatch between counter values saved across CPU hotplug
by perf and tracecounter logic, incorrect values are calculated for
first entry in trace buffer.
Ignore the first entry when CPU comes out of hotplug and set previous
counter values in this scenario.

Change-Id: Ieeeaa301d713f338f11f6e84aeb984a3708e45fc
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
Perf: Reset pmu after hotplug

The counter enable bits were staying in undefined state after CPU
came out of hotplug when perf was not enabled.
This was resulting into non-zero values for counters in ftrace buffer
which were not enabled by perf.
Clear the pmu when CPU comes out of hotplug and perf is not enabled.

Change-Id: I31e17565ad914650a12102a5c359b363f8f2ca2a
Signed-off-by: Sheetal Sahasrabudhe <sheetals@codeaurora.org>
msm: perf: set filter bits for cycle counter on krait

When programming the cycle counter on krait, the filter
register needs to be programmed in order to set the
usermode/kernelmode filter options.

Change-Id: Ifd5b032c9a5df4821706438d4359f84d8f614468
Signed-off-by: Neil Leeder <nleeder@codeaurora.org>
msm: HTC: fighter: disable synaptics ts fw timeout

This firmware timeout causes touchscreen to often not work in recovery.

Change-Id: I72a95130aa3591627b1282f3ad0ab351a26bf032