[AArch64] Add workaround for Cortex-A53 erratum (835769)

Some early revisions of the Cortex-A53 have an erratum (835769) whereby it is
possible for a 64-bit multiply-accumulate instruction in AArch64 state to
generate an incorrect result.  The details are quite complex and hard to
determine statically, since branches in the code may exist in some
circumstances, but all cases end with a memory (load, store, or prefetch)
instruction followed immediately by the multiply-accumulate operation.

The safest work-around for this issue is to make the compiler avoid emitting
multiply-accumulate instructions immediately after memory instructions and the
simplest way to do this is to insert a NOP.

This patch implements clang options to enable this workaround in the backend.

The work-around code generation is not enabled by default.



git-svn-id: http://llvm.org/svn/llvm-project/cfe/trunk@219604 91177308-0d34-0410-b5e6-96231b3b80d8
Adds support for the Cortex-A17 processor to Clang

Patch by Matthew Wahab.

git-svn-id: http://llvm.org/svn/llvm-project/cfe/trunk@219607 91177308-0d34-0410-b5e6-96231b3b80d8