libc: separate x64-specific code and provide aarch64 stubs

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: mmu: distinguish between device and normal memory

we need to do that because load/store instructions
behave differently with Device-nGnRnE memory.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: gic: implement GICv2

implement simple GIC class for interacting with
the GIC distributor and CPU interface.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: exceptions: implement interrupt table

implement a simple interrupt table to register
interrupt IDs and handlers. Map the GIC so it
can be initialized by the table constructor.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: smp: prepare GIC initialization per cpu

arch::init_on_cpu should initialize the gic cpu interface,
but not for the boot CPU, for which this has already been
done.

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>
aarch64: implement basic General Timers infrastructure

Signed-off-by: Claudio Fontana <claudio.fontana@huawei.com>