begin refactoring VIC-IV data fetch to untangle and simplify the
data fetch from data processing aspects of the FSM, and effectively
move to a more general pipeline structure.  starting on badline
screen ram fetches.
fix numerous bugs in refactored screen row fetch logic.
wait until ramdata available before writing.
add one more missing memory wait-state to badline screen ram
fetch.  now seems to fetch the correct data.
separate screen ram (row) buffer read and write addresses.
currently reads wrong data after 1st character.
fix bugs with refactored screen ram (badline) fetching.
fix full colour text rendering bug.