libbladeRF: add generic read/write bytes functions to accessig "GPIO" registers
hdl: prepare NiOS for expansion board upgrade

This commit adds a secondary select like to the DAC SPI controller (the
secondary select line is meant for the expansion board). Two parallel PIO ports
are are also added. One is an in/out PIO for expansion board GPIO values and the
other is for controlling the direction of the aforementioned PIO.
hdl: rework the embedded NiOS code, add XB support

This commit reworks the current NiOS code to make it more managable. The "GPIO"
device now have a register map that is defined by the variable gdev_lut:

Offset : Device
[ 0]   :  GDEV_GPIO
[ 4]   :  GDEV_IQ_CORR_RX
[ 8]   :  GDEV_IQ_CORR_TX
[12]   :  GDEV_FPGA_VERSION
[16]   :  GDEV_TIME_TIMER
[34]   :  GDEV_VCTXCO
[36]   :  GDEV_XB_LO (XB_SPI)
[40]   :  GDEV_EXPANSION
[44]   :  GDEV_EXPANSION_DIR
libbladeRF: move VCTCXO into GPIO device register map.

The VCTCXO device is similar to a few other devices so it is now part of the
GPIO device register map. This commit changes the way libbladeRF accesses
the VCTCXO.
libbladeRF: add SPI support to expansion board
libbladeRF: add GPIO value support to expansion board

Reading and writing the GPIO register will not correspond to the expansion board
headers.
libbladeRF: add GPIO direction support to expansion board

This commit adds functions that help set the drectio of the expansion board GPIO pins.
hdl: add expansion board support

This commit reuses the DAC SPI controller for the SPI bus on the expansion board
header. Expansion board GPIO value and direction registers are added.
hdl: add support for underrun notification in meta header

The LSB of the flags metaheader field now encode wether or not an underflow
occured since the last time an RX frame was read by the host.
hdl: hardware RX timestamps to be TX timestamps

The RX and TX clock domains are in perfect sync as they are both derived from
the same PLL. To simply the HDL, RX timestamps are now defined to be TX
timestamps.
hdl: fx3_gpif arbiter gives preference to tx

This commit makes the FX3 GPIF arbiter give higher priority to TX packets over
RX. This means that if there is a pending TX transaction the HDL will execute
over any RX transactions even if the RX transaction is starved.