input: don't send dummy release event when system resumes

Dummy release event is sent when system resumes. This behavior
makes long press detection failed for some keys like POWER key
and HEADSET key. Add INPUT_PROP_NO_DUMMY_RELEASE to make it is
possible for some input to avoid this behavior.

Signed-off-by: Kun Liang <kunliang@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm8974: msm_hotplug: Reduce load constraints

Signed-off-by: Pranav Vashi <neobuddy89@gmail.com>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
USB: dwc3: Squashed commit of upstream changes

USB: dwc3: debugfs: Enable logging of control endpoint events by default

Enable logging of EP0 control events, which will be useful for analyzing
the USB issues like crash. Also add more required events wherever required.

Change-Id: I0fd3edfa2cd8711928cd480e99abbf8e6f907774
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3_otg: Move to A_IDLE state if unable to start host

As part of ID clear, OTG driver tries to start host mode. This may
fail if regulator driver is not ready and returns -EPROBE_DEFER
for VBUS regulator_get. Instead of moving to UNDEFINED state, move
OTG state-machine to A_IDLE so that it can retry start_host later
when notified again as part of regulator driver's initialization.

CRs-Fixed: 513074
Change-Id: I1711bfaa0c7ceed01d596f5a10c8d25a8d3931e0
Signed-off-by: Manu Gautam <mgautam@codeaurora.org>

USB: dwc3: msm: add charger detection for floated D+ and D-

Floated charger means "D+/D- floated charger". According batt
charging spec 1.2, during primary detection, the DP voltage
is VDP_SRC, DM voltage may not exceed VDAT_REF, it's same to
standard downstream port(SDP). Introducing data contact
detection(DCD) here to distinguish between SDP and floated
charger. If DCD detected, it's SDP, otherwise floated charger
is detected. Also rename UNSUPPORTED charger as FLOATED charger
as data lines D+/D- are floating.

Change-Id: I0fd307c512f46331e6e1d80759c1585fc1db8a39
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3-msm: Fix LPM related issues with FLOATED charger connected

Currently dwc3-msm driver is putting HSPHY into RETENTION apart from
voting for VDD minimization when FLOATED charger is connected. This
results in spurious MPM interrupt getting triggered during system
suspend.  Due to this, charger detection will be performed endlessly
in case of FLOATED charger. Hence don't put HSPHY into RETENTION with
FLOATED charger connected and also fix bug in incrementing charger
retry count.

CRs-Fixed: 516013
Change-Id: If76fcacf60e880c8752d7461670adb4bab0f4b72
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

usb: dwc3-msm: Add support for controller power collapse

Starting from msm USB core version 1.2.0, if usb cable is
disconnected controller power collapse is allowed. Hence
add support to vote for Global Distributed Switch
Controller (GDSC) when usb cable is connected and remove
the vote when cable is disconnected to shut down the
controller power.

CRs-Fixed: 498960
Change-Id: Ia1d8bb1b8fb5370a335d28fade72485def68f80c
Signed-off-by: Hemant Kumar <hemantk@codeaurora.org>

usb: dwc3-msm: remove use of global context variable (ADC)

Remove usage of the global context variable by retrieving the
instance from the dev pointer passed to the sysfs functions. This
will allow the driver to eventually support multiple instances.

Change-Id: If08ddcab8cdb4753c04add1f2b9efa683bcab474
Signed-off-by: Jack Pham <jackp@codeaurora.org>

usb: dwc3-msm: remove use of global context variable (regulators)

Remove usage of the global context variable in the regulator and
block reset helper functions by passing the dwc3_msm pointer as a
parameter. This will allow the driver to eventually support multiple
instances.

Change-Id: I4e6892ff71a1482c319b6633e7a1ed128c93a3bf
Signed-off-by: Jack Pham <jackp@codeaurora.org>

usb: dwc3-msm: remove use of global context variable (charger)

Remove usage of the global context variable in the charger detection
functions by retrieving the dwc3_msm instance from the dev pointer
passed to the sysfs functions. This will allow the driver to eventually
support multiple instances.

Change-Id: Ia11ec77c04239ae8afacc7dab0b38eaf85024276
Signed-off-by: Jack Pham <jackp@codeaurora.org>

usb: dwc3-msm: remove global context variable

Now that all uses of the global context variable have been removed,
remove the variable itself. This allows the dwc3-msm driver to
support multiple device instances.

Change-Id: Ic1aa6b6a16323cc03870101a157ec35de0c6899b
Signed-off-by: Jack Pham <jackp@codeaurora.org>

usb: dwc3-msm: rename local variables to mdwc

Do 's/msm/mdwc/' throughout the file as 'msm' is a confusing
name to use as a local variable. This makes usage uniform
and consistent with 'mdwc' used in other functions.

Change-Id: I5f94ec518ee4f0dc1324c7e75ee7c077b13cbe91
Signed-off-by: Jack Pham <jackp@codeaurora.org>

USB: dwc3: Dump all relevant core and PHY registers for Erratic error event

DWC3 controller will generate Erratic event if PHY doesn't respond to
PHY command sent by core within stipulated time. In normal case, this
should not happen. Hence dump all relevant core and QSCRATCH registers
to figure out the reason for this Erratic event.

CRs-Fixed: 515005
Change-Id: I02380885a401d9686a542faad16c29e25ac8964f
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

Revert "usb: host: hs_phy_irq wakeup only when host mode and controller lpm"

This reverts commit b0d5ec245d11d557572ece4333f20ca0290a5b0c.

Change-Id: I23fbb115eaefef5be52f3f25da45c6cd4d468e39

USB: dwc3: msm: Implement new initialization sequence

Currently dwc3-msm driver is not following the initialization
sequence as per new hardware programming guide. Hence implement
new initialization sequence. The new sequence does PHY reset
under GCTL reset

This change solves the USB enumeration issue seen with HS/LS devices
connect/disconnect over TI USB3.0 HUB.

CRs-Fixed: 477323
CRs-Fixed: 515048
Change-Id: Ia0500517290c82f6ca6dc9dc32b4cee1e4f44aff
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3: Allocate 3KB FIFO for bulk and isochronous endpoints

Currently dwc3 driver will allocate fifo size of maximum endpoint
packet size for TX endpoints depending on operating speed. Due
to this, double buffering may not work for TX endpoints in both high
speed and superspeed. Hence implement policy that allocates 3KB of
fifo for all bulk and isochronous endpoints irrespective of speed.

Policy is to allocate 3KB for bulk and isochronous endpoints and
allocate maximum packet size for control and interrupt endpoints.
This policy will improve the TX throughput numbers for function
drivers like MTP, mass storage. But side effect is we can't accomodate
more than nine bulk + isochronous endpoints in non QDSS composition
and five bulk + isochronous endpoints in QDSS composition. Otherwise
last interfaces in the USB composition will not work.

CRs-Fixed: 532070
Change-Id: I5e947f21f25fada7829c84eba45980295497cfbc
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

Revert "USB: dwc3: core: Add module parameter for TX fifo resize"

commit "dbe59bf157adf17a39c041ff9379bd5ec751da5c:USB: dwc3: core:
Add module parameter for TX fifo resize" disables dynamic fifo
allocation for TX endpoints by default and provides an option to
enable it for QDSS heavy composition.

Earlier tx fifo resize logic was causing throughput discrepancy
in high speed operation due to double buffering not happening.
With the new policy to allocate 3KB for all bulk and isochronous eps
implemented, this issue will be resolved. Hence revert the change to
always enable dynamic fifo allocation for TX endpoints which will
improve throughput in superspeed mode by having larger fifo to allow
double buffering.

CRs-Fixed: 532070
Change-Id: I9984637d9d3edf8067c4604ed661d3ef8ac426c4
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3-msm: Add recovery mechanism for erratic error event

DWC3 controller will generate Erratic event if PHY doesn't respond to
PHY command sent by core within stipulated time. In normal case, this
should not happen. Due to this, USB functionality will break if not
added recovery mechanism for handling this erratic error event. Hence
add recovery mechanism by doing block reset whenever Erratic error
event is triggered by contoller.

CRs-Fixed: 535976
Change-Id: I5c8cc0c822a26c7fe4b8ac58b651d9a3267626ce
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3: Fix QDSS data integrity issue

Currently RAM12, RAM13 are being used for data fifo and
descriptor fifo allocations in QDSS BAM <-> BAM usecase. Remaining
16KB out of 29KB is being used for allocation of TX FIFO for
USB IN endpoints in the composition. This resulting in data corruption
when captured with host side application. Due to this, QTF host
application is not able to parse the data collected over USB.
Hence reserve RAM11, RAM12, RAM13 for 16KB data fifo allocation and
5KB descritor fifo allocation in QDSS mode and use remaining 8KB for
TX FIFO allocation for IN endpoints.

As available tx fifo size is reduced in QDSS mode, allocate 1KB for
bulk and isochronous endpoints in highspeed mode and also for nonburst
endpoints in superspeed mode. For burst endpoint in superspeed mode,
allocate 3KB for TX FIFO.

CRs-Fixed: 553147
Change-Id: I6d50d2da631a95a921c47bb1fb1139477840a73c
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3-msm: Add support for overriding SSPHY deemphasis setting

TX deemphasis value can be different from platform to platform.
This value has to be set to suitable value to pass USB3 complaince
test. Hence add support for overriding this deemphasis value from
device tree.

CRs-Fixed: 536912
Change-Id: Ic3c2213fc0d090407057525115eae1351ecc4668
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3: clear LANE0_PWR_PRESENT bit after initialization

Currently dwc3-msm driver is setting LANE0_PWR_PRESENT in QSCRATCH
SS_PHY_CTRL register, but not clearing this bit after completion of
initialization. This is affecting data lines behaviour during
charger detection issues when connected wall charger or HVDCP charger.
Hence clear this bit after completion of initialization sequence.

CRs-Fixed: 561316
Change-Id: I05fb75b77c45fc9466a832c83cf2be120dbe3fa2
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3_msm: Disable all events before error recovery for Erratic event

Currently as part of Erratic event handling, dumping all relevant registers
and then scheduling work for block reset. This does lead to erratic event
getting fired continuously and might result in watchdog crash. Hence
disable all events in DEVTEN regiser before doing block reset and reenable
the events once block reset is completed.

Change-Id: Ib2644ea8471cb87792a9524dc5103b61b2d0a74c
Signed-off-by: Wesley Cheng <wcheng@codeaurora.org>
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

usb: dwc3_otg: Turn on VBUS before starting host

Currently the VBUS regulator is enabled only after initializing
the xHCI host stack, which can result in enumeration failures
for certain devices. This is likely due to VBUS having a
finite rise time when it is turned on, especially when a load
is already attached. Mitigate this by enabling VBUS first before
starting the host stack.

CRs-Fixed: 599498
Change-Id: I9785ae4682d0a2dfbcec921b869fc03550e0db82
Signed-off-by: Jack Pham <jackp@codeaurora.org>

USB: dwc3-msm: Fix USB connection issue after DCP charger disconnection

Commit "6e3630b5f28c60c403af8c6b3c87679d3d98d6af: usb: dwc3-msm: Support
external charging detection " has added check not to start charger
detection in case charger detection is done by external circuit. when otg
driver calls charger_detection API to set charger type to invalid as part
of VBUS disconnect handling, this check prevents to do that. This results
next charger detection not happening after DCP charger disconnection.
Hence fix the issue by moving down the check in the charger_detection API.

Change-Id: I5c614a208f22e4cd9f334c80dae6831bcff64ada
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3_otg: Retry if vbus regulator get fail with -EPROBE_DEFER

As part of ID clear, OTG driver tries to start host mode. This might
fail if regulator driver is not ready and returns -EPROBE_DEFER for
VBUS regulator_get. Hence schedule sm_work for one second delay in
case of -EPROBEDEFER so that it can retry start_host again.

CRs-Fixed: 546709
Change-Id: Iab443e7984619d474b15b695fbf5b7639a41ddd0
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>

USB: dwc3_otg: Use correct delay for sm_work scheduling in A_IDLE

commit 711b9b117cd983fbf7c29d79596a358a36e288d3: "USB: dwc3_otg:
Retry if vbus regulator get fail with -EPROBE_DEFER" is required
for scheduling sm_work after one sec in case vbus_regulator get
fails when host cable connected during bootup. This introduced a
bug where sm_work is scheduled for delay much greater than one sec.
Hence fix the issue by using correct delay in case vbus_regulator
get fails during bootup.

Change-Id: I5001808962373ff03cf37de04e76ce264d5595e4
Signed-off-by: Vijayavardhan Vennapusa <vvreddy@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: pm: print active clocks before entering into pc

print out all active clocks during idle power collapse
and suspend power collapse using clock debug API

CRs-fixed: 596828
Change-Id: Ie653c02d490b80de001f61fe8320ee851bb139c7
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: pm: bug in pc debug counters logic

The logic to find the location to add debug counter
for a CPU is incorrect and due to this the counter
of next CPU is corrupted. The logic is updated to
correct this.

CRs-fixed: 596773
Change-Id: I6de21bd480720d80ad9801d8a1331b6faf689b95
Signed-off-by: Anil kumar mamidala <amami@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>
msm: mdss: optimize MDP pipes cleanup

There are cases where pipe cleanup can happen without display commit.
This means that the pipe was never programmed to hardware, in these
cases the pipe can be cleaned up without the need of display commit
cycle to happen. Also there is no need to access hardware to release
resources such as SMPs since they have not been programmed yet.

Change-Id: I57a46471dc1fba4e45e55c3543940ba4fba0540a
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Signed-off-by: Dan Trifan <jimsth@gmail.com>