The andi16, addiusp and jraddiusp micromips instructions were missing dedicated decoder methods in MipsDisassembler.cpp to properly decode immediate operands. These methods are added together with corresponding tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223006 91177308-0d34-0410-b5e6-96231b3b80d8
R600/SI: Various instruction format bit test cleanups

- Fix missing SALU format bits
- Remove unused isSALUInstr
- Add isVALU
- Switch isDS to use a bit like the others
- Move SIInstrInfo::is* functions to header
- Reorder so they are approximately sorted by type (SALU, VALU, memory)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223038 91177308-0d34-0410-b5e6-96231b3b80d8
Partial revert of r222986.

The explicit set of destination types is not fully redundant when lazy loading
since the TypeFinder will not find types used only in function bodies.

This keeps the logic to drop the name of mapped types since it still helps
with avoiding further renaming.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223043 91177308-0d34-0410-b5e6-96231b3b80d8
SelectionDAG switch lowering: Replace unreachable default with most popular case.

This can significantly reduce the size of the switch, allowing for more
efficient lowering.

I also worked with the idea of exploiting unreachable defaults by
omitting the range check for jump tables, but always ended up with a
non-neglible binary size increase. It might be worth looking into some more.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223049 91177308-0d34-0410-b5e6-96231b3b80d8
SimplifyCFG: don't remove unreachable default switch destinations

An unreachable default destination can be exploited by other optimizations, and
SDag lowering is now prepared to handle them efficiently.

For example, branches to the unreachable destination will be optimized away,
such as in the case of range checks for switch lookup tables.

On 64-bit Linux, this reduces the size of a clang bootstrap by 80 kB (and
Chromium by 30 kB).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223050 91177308-0d34-0410-b5e6-96231b3b80d8
SimplifyCFG: Omit range checks for switch lookup tables when default is unreachable

They would get optimized away later, but we might as well not emit them.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223051 91177308-0d34-0410-b5e6-96231b3b80d8
Revert r223049, r223050 and r223051 while investigating test failures.

I didn't foresee affecting the Clang test suite :/

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ARM: lower tail calls correctly when using GHC calling convention.

Patch by Ben Gamari.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223055 91177308-0d34-0410-b5e6-96231b3b80d8
Drop SrcStructTypesSet. It is redundant.

At the only point in the code it is used, we haven't added any of the src types
to DstStructTypesSet yet.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223057 91177308-0d34-0410-b5e6-96231b3b80d8
[MachineVerifier] Accept a MBB with a single landing pad successor.

The MachineVerifier used to check that there was always exactly one
unconditional branch to a non-landingpad (normal) successor.
If that normal successor to an invoke BB is unreachable, it seems
reasonable to only have one successor, the landing pad.
On targets other than AArch64 (and on AArch64 with a different testcase),
the branch folder turns the branch to the landing pad into a fallthrough.
The MachineVerifier, which relies on AnalyzeBranch, is unable to check
the condition, and doesn't complain. However, it does in this specific
testcase, where the branch to the landing pad remained.
Make the MachineVerifier accept it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223059 91177308-0d34-0410-b5e6-96231b3b80d8
Use C++ typed enums instead of 'unsigned char' for MCInst Kind.  NFC.

This makes it much easier to see the value of operands in the debugger.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223060 91177308-0d34-0410-b5e6-96231b3b80d8
Use a range loop. NFC.

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Use a continue to reduce indentation and clang-format. NFC.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223067 91177308-0d34-0410-b5e6-96231b3b80d8
[OCaml] [cmake] Add CMake buildsystem for OCaml.

Closes PR15325.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223071 91177308-0d34-0410-b5e6-96231b3b80d8
[OCaml] Move Llvm.clone_module to its own Llvm_transform_utils module.

This way most code won't link this (substantially large) library,
if compiled statically with LLVM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223072 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Fix v2i8->i16 bitcast legalization.

r213378 improved f16 bitcasts, so that they go directly through subregs,
instead of through the stack.  That code now causes an assertion failure
for bitcasts from other 16-bits types (most importantly v2i8).

Correct that by doing the custom lowering for i16 bitcasts only when the
input is an f16.

Part of PR21549.

Differential Revision: http://reviews.llvm.org/D6307


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223074 91177308-0d34-0410-b5e6-96231b3b80d8
[AArch64] Don't combine "select (setcc i1 LHS, RHS), vL, vR".

r208210 introduced an optimization that improves the vector select
codegen by doing the setcc on vectors directly.
This is a problem they the setcc operands are i1s, because the
optimization would create vectors of i1, which aren't legal.

Part of PR21549.

Differential Revision: http://reviews.llvm.org/D6308


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223075 91177308-0d34-0410-b5e6-96231b3b80d8
Parse 'ghccc' in .ll files as the GHC convention (cc 10)

Previously we just used "cc 10" in the .ll files, but that isn't very
human readable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223076 91177308-0d34-0410-b5e6-96231b3b80d8
[NVPTX] Do not emit .weak symbols for NVPTX

Summary:
".weak" symbols cannot be consumed by ptxas (PR21685). This patch makes the
weak directive in MCAsmPrinter customizable, and disables emitting ".weak"
symbols for NVPTX.

Test Plan: weak-linkage.ll

Reviewers: jholewinski

Reviewed By: jholewinski

Subscribers: majnemer, jholewinski, llvm-commits

Differential Revision: http://reviews.llvm.org/D6455

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@223077 91177308-0d34-0410-b5e6-96231b3b80d8
[Statepoints 1/4] Statepoint infrastructure for garbage collection: IR Intrinsics

The statepoint intrinsics are intended to enable precise root tracking through the compiler as to support garbage collectors of all types. The addition of the statepoint intrinsics to LLVM should have no impact on the compilation of any program which does not contain them. There are no side tables created, no extra metadata, and no inhibited optimizations.

A statepoint works by transforming a call site (or safepoint poll site) into an explicit relocation operation. It is the frontend's responsibility (or eventually the safepoint insertion pass we've developed, but that's not part of this patch series) to ensure that any live pointer to a GC object is correctly added to the statepoint and explicitly relocated. The relocated value is just a normal SSA value (as seen by the optimizer), so merges of relocated and unrelocated values are just normal phis. The explicit relocation operation, the fact the statepoint is assumed to clobber all memory, and the optimizers standard semantics ensure that the relocations flow through IR optimizations correctly.

This is the first patch in a small series.  This patch contains only the IR parts; the documentation and backend support will be following separately.  The entire series can be seen as one combined whole in http://reviews.llvm.org/D5683.

Reviewed by: atrick, ributzka





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